Issued Patents All Time
Showing 51–75 of 144 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7421598 | Dynamic power management via DIMM read operation limiter | Mark A. Brittain, Edgar R. Cordero, Warren E. Maule, Eric E. Retter | 2008-09-02 |
| 7418541 | Method for indirect access to a support interface for memory-mapped resources to reduce system connectivity from out-of-band support processor | Paul Frank Lecocq, Brian Chan Monwai, Thomas Pflueger, Kevin F. Reick, Timothy M. Skergan +1 more | 2008-08-26 |
| 7409580 | System and method for recovering from errors in a data processing system | Edgar R. Cordero, Kevin C. Gower, Eric E. Retter, Scott Barnett Swaney | 2008-08-05 |
| 7409481 | Data processing system, method and interconnect fabric supporting destination data tagging | Leo James Clark, Guy L. Guthrie, William J. Starke, Jeffrey A. Stuecheli | 2008-08-05 |
| 7392350 | Method to operate cache-inhibited memory mapped commands to access registers | Michael Stephen Floyd, Paul Frank Lecocq, Larry Scott Leitner, Kevin F. Reick | 2008-06-24 |
| 7389388 | Data processing system and method for efficient communication utilizing an in coherency state | Jason F. Cantin, Steven R. Kunkel, William J. Starke | 2008-06-17 |
| 7380161 | Switching a defective signal line with a spare signal line without shutting down the computer system | Edgar R. Cordero, Kevin C. Gower, Eric E. Retter | 2008-05-27 |
| 7308557 | Method and apparatus for invalidating entries within a translation control entry (TCE) cache | Richard Louis Arndt, George William Daly, Warren E. Maule | 2007-12-11 |
| 7308537 | Half-good mode for large L2 cache array topology with different latency domains | Guy L. Guthrie, Kirk Samuel Livingston, William J. Starke | 2007-12-11 |
| 7305522 | Victim cache using direct intervention | Leo James Clark, Guy L. Guthrie, Bradley McCredie, William J. Starke | 2007-12-04 |
| 7305526 | Method, system, and program for transferring data directed to virtual memory addresses to a device memory | Michael T. Benhase, Robert Alan Cargnoni, Michael John Mayfield, Bruce Mealey | 2007-12-04 |
| 7284097 | Modified-invalid cache state to reduce cache-to-cache data transfer operations for speculatively-issued full cache line writes | John Steven Dodson, Guy L. Guthrie, Kenneth L. Wright | 2007-10-16 |
| 7254694 | Processors interconnect fabric with relay broadcasting and accumulation of partial responses | Leo James Clark, Guy L. Guthrie, William J. Starke, Jeffrey A. Stuecheli | 2007-08-07 |
| 7243194 | Method to preserve ordering of read and write operations in a DMA system by delaying read access | George William Daly, Paul Umbarger, Kenneth L. Wright | 2007-07-10 |
| 7194645 | Method and apparatus for autonomic policy-based thermal management in a data processing system | Andreas Bieswanger, Lee Evan Eisen, Michael Stephen Floyd, Bradley McCredie, Naresh Nayar | 2007-03-20 |
| 7143226 | Method and apparatus for multiplexing commands in a symmetric multiprocessing system interchip link | Michael Stephen Floyd, Paul Frank Lecocq | 2006-11-28 |
| 7143387 | Method, system and program product providing a configuration specification language that supports the definition of links between configuration constructs | Wolfgang Roesner, Derek E. Williams | 2006-11-28 |
| 7116142 | Apparatus and method for accurately tuning the speed of an integrated circuit | Frank D. Ferraiolo, Norman K. James, Bradley McCredie | 2006-10-03 |
| 7058767 | Adaptive memory access speculation | John Steven Dodson, Sanjeev Ghai, Jeffrey A. Stuecheli | 2006-06-06 |
| 7007210 | Method and system for handling multiple bit errors to enhance system reliability | Alongkorn Kitamorn, Wayne Lemmon, David Otto Lewis, Kevin F. Reick | 2006-02-28 |
| 6970936 | Data processing system and method of communication that employ a request-and-forget protocol | Sanjeev Ghai | 2005-11-29 |
| 6901485 | Memory directory management in a multi-node computer system | Ravi Kumar Arimilli, John Steven Dodson | 2005-05-31 |
| 6886079 | Dynamic history based mechanism for the granting of exclusive data ownership in a non-uniform memory access (NUMA) computer system | Ravi Kumar Arimilli, John Steven Dodson | 2005-04-26 |
| 6848003 | Multi-node data processing system and communication protocol that route write data utilizing a destination ID obtained from a combined response | Ravi Kumar Arimilli, Guy L. Guthrie, Jody B. Joyner, Jerry Don Lewis | 2005-01-25 |
| 6832342 | Method and apparatus for reducing hardware scan dump data | Michael Youhour Lim, Kevin F. Reick | 2004-12-14 |