Issued Patents All Time
Showing 76–100 of 144 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6763433 | High performance cache intervention mechanism for symmetric multiprocessor systems | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie | 2004-07-13 |
| 6760809 | Non-uniform memory access (NUMA) data processing system having remote memory cache incorporated within system memory | Ravi Kumar Arimilli, John Steven Dodson | 2004-07-06 |
| 6760817 | Method and system for prefetching utilizing memory initiated prefetch write operations | Ravi Kumar Arimilli, John Steven Dodson | 2004-07-06 |
| 6754782 | Decentralized global coherency management in a multi-node computer system | Ravi Kumar Arimilli, John Steven Dodson | 2004-06-22 |
| 6721853 | High performance data processing system via cache victimization protocols | Guy L. Guthrie, Ravi Kumar Arimilli, John Steven Dodson | 2004-04-13 |
| 6721856 | Enhanced cache management mechanism via an intelligent system bus monitor | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie | 2004-04-13 |
| 6711652 | Non-uniform memory access (NUMA) data processing system that provides precise notification of remote deallocation of modified data | Ravi Kumar Arimilli, John Steven Dodson | 2004-03-23 |
| 6704843 | Enhanced multiprocessor response bus protocol enabling intra-cache line reference exchange | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie | 2004-03-09 |
| 6678814 | Method and apparatus for allocating data usages within an embedded dynamic random access memory device | Ravi Kumar Arimilli, Sanjeev Ghai, Praveen S. Reddy, William J. Starke | 2004-01-13 |
| 6671712 | Multi-node data processing system having a non-hierarchical interconnect architecture | Ravi Kumar Arimilli, Guy L. Guthrie, Jody B. Joyner, Jerry Don Lewis | 2003-12-30 |
| 6658538 | Non-uniform memory access (NUMA) data processing system having a page table including node-specific data storage and coherency control | Ravi Kumar Arimilli, John Steven Dodson | 2003-12-02 |
| 6654857 | Non-uniform memory access (NUMA) computer system having distributed global coherency management | Ravi Kumar Arimilli, John Steven Dodson | 2003-11-25 |
| 6633959 | Non-uniform memory access (NUMA) data processing system that provides notification of remote deallocation of shared data | Ravi Kumar Arimilli, John Steven Dodson | 2003-10-14 |
| 6631450 | Symmetric multiprocessor address bus protocol with intra-cache line access information | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie | 2003-10-07 |
| 6629210 | Intelligent cache management mechanism via processor access sequence analysis | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie | 2003-09-30 |
| 6622222 | Sequencing data on a shared data bus via a memory buffer to prevent data overlap during multiple memory read operations | Ravi Kumar Arimilli, Warren E. Maule | 2003-09-16 |
| 6615322 | Two-stage request protocol for accessing remote memory data in a NUMA data processing system | Ravi Kumar Arimilli, John Steven Dodson | 2003-09-02 |
| 6606680 | Method and apparatus for accessing banked embedded dynamic random access memory devices | Ravi Kumar Arimilli, Sanjeev Ghai, Praveen S. Reddy, William J. Starke | 2003-08-12 |
| 6601145 | Multiprocessor system snoop scheduling mechanism for limited bandwidth snoopers that uses dynamic hardware/software controls | Ravi Kumar Arimilli, Sanjeev Ghai, Guy L. Guthrie, Jody B. Joyner | 2003-07-29 |
| 6601144 | Dynamic cache management in a symmetric multiprocessor system via snoop operation sequence analysis | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie | 2003-07-29 |
| 6591307 | Multi-node data processing system and method of queue management in which a queued operation is speculatively cancelled in response to a partial combined response | Ravi Kumar Arimilli, Guy L. Guthrie, Jody B. Joyner, Jerry Don Lewis | 2003-07-08 |
| 6591321 | Multiprocessor system bus protocol with group addresses, responses, and priorities | Ravi Kumar Arimilli, Guy L. Guthrie, Jody B. Joyner, Jerry Don Lewis | 2003-07-08 |
| 6581139 | Set-associative cache memory having asymmetric latency among sets | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2003-06-17 |
| 6574719 | Method and apparatus for concurrently communicating with multiple embedded dynamic random access memory devices | Ravi Kumar Arimilli, Sanjeev Ghai, Praveen S. Reddy, William J. Starke | 2003-06-03 |
| 6553463 | Method and system for high speed access to a banked cache memory | Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, Sanjeev Ghai, Praveen S. Reddy | 2003-04-22 |