Issued Patents All Time
Showing 251–275 of 276 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7038263 | Integrated circuits with rhodium-rich structures | Dan Gealy, Gurtej S. Sandhu, Howard E. Rhodes, Mark Visokay | 2006-05-02 |
| 7002209 | MOSFET structure with high mechanical stress in the channel | Xiangdong Chen, Dureseti Chidambarrao, Oleg Gluschenkov, Brian J. Greene, Kern Rim | 2006-02-21 |
| 6984564 | Structure and method to improve SRAM stability without increasing cell area or off current | Shih-Fen Huang, Clement Wann | 2006-01-10 |
| 6946709 | Complementary transistors having different source and drain extension spacing controlled by different spacer sizes | — | 2005-09-20 |
| 6939814 | Increasing carrier mobility in NFET and PFET transistors on a common wafer | Victor Chan | 2005-09-06 |
| 6924195 | Methods of forming metal-comprising materials and capacitor electrodes; and capacitor constructions | — | 2005-08-02 |
| 6916380 | System for depositing a layered film | Gurtej S. Sandhu | 2005-07-12 |
| 6908806 | Gate metal recess for oxidation protection and parasitic capacitance reduction | Ramachandra Divakaruni, Oleg Gluschenkov, Rajeev Malik, Hongwen Yan, Ravikumar Ramachandran | 2005-06-21 |
| 6906360 | Structure and method of making strained channel CMOS transistors having lattice-mismatched epitaxial extension and source and drain regions | Huajie Chen, Dureseti Chidambarrao, Omer Dokumaci | 2005-06-14 |
| 6891192 | Structure and method of making strained semiconductor CMOS transistors having lattice-mismatched semiconductor regions underlying source and drain regions | Huajie Chen, Dureseti Chidambarrao, Oleg Gluschenkov, An Steegen | 2005-05-10 |
| 6881635 | Strained silicon NMOS devices with embedded source/drain | Dureseti Chidambarrao, Effendi Leobandung, Anda C. Mocuta, Huilong Zhu | 2005-04-19 |
| 6858536 | Processes to form a metallic film stack | Gurtej S. Sandhu | 2005-02-22 |
| 6831006 | Structure and method for eliminating metal contact to P-well or N-well shorts or high leakage paths using polysilicon liner | Ramachandra Divakaruni, Jack A. Mandelman | 2004-12-14 |
| 6781175 | Rhodium-rich integrated circuit capacitor electrode | Dan Gealy, Gurtej S. Sandhu, Howard E. Rhodes, Mark Visokay | 2004-08-24 |
| 6759705 | Platinum-rhodium stack as an oxygen barrier in an integrated circuit capacitor | Gurtej S. Sandhu | 2004-07-06 |
| 6740554 | Methods to form rhodium-rich oxygen barriers | Dan Gealy, Gurtej S. Sandhu, Howard E. Rhodes, Mark Visokay | 2004-05-25 |
| 6693017 | MIMcap top plate pull-back | Mohammed Fazil Fayaz, Uwe Kerst, Joseph J. Mezzapelle | 2004-02-17 |
| 6660581 | Method of forming single bitline contact using line shape masks for vertical transistors in DRAM/e-DRAM devices | Ramachandra Divakaruni | 2003-12-09 |
| 6642566 | Asymmetric inside spacer for vertical transistor | Jack A. Mandelman, Ramachandra Divakaruni | 2003-11-04 |
| 6596596 | Methods of forming a field effect transistors | — | 2003-07-22 |
| 6555473 | Field effect transistors and methods of forming a field effect transistor | — | 2003-04-29 |
| 6524867 | Method for forming platinum-rhodium stack as an oxygen barrier | Gurtej S. Sandhu | 2003-02-25 |
| 6518610 | Rhodium-rich oxygen barriers | Dan Gealy, Gurtej S. Sandhu, Howard E. Rhodes, Mark Visokay | 2003-02-11 |
| 6475856 | Capacitors and capacitor forming methods | — | 2002-11-05 |
| 6391801 | Method of forming a layer comprising tungsten oxide | — | 2002-05-21 |