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Stacked transistors having an isolation region therebetween and a common gate electrode, and related fabrication methods |
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Integrated circuit devices including a via and methods of forming the same |
Harsono S. Simka, Anthony Dongick LEE, Seowoo Nam, Sang-Hoon Ahn |
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Semiconductor device having a self-forming barrier layer at via bottom |
Larry Zhao, Xunyuan Zhang, Sean Xuan Lin |
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Fully aligned via integration with selective catalyzed vapor phase grown materials |
Harsono S. Simka, Rebecca Park |
2023-07-18 |
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Substrate structure with spatial arrangement configured for coupling of surface plasmons to incident light |
Somnath Ghosh, Eswar Ramanathan, Qanit Takmeel, Jeric Sarad, Ashwini Chandrashekar +4 more |
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Semiconductor device having a self-forming barrier layer at via bottom |
Larry Zhao, Xunyuan Zhang, Sean Xuan Lin |
2019-10-01 |
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Multi-directional self-aligned multiple patterning |
Colin Bombardier, Vikrant Chauhan, Anbu Selvam KM Mahalingam, Keith Donegan |
2019-02-05 |
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Integrated circuits including magnetic tunnel junctions for magnetoresistive random-access memory and methods for fabricating the same |
Seowoo Nam, Craig Child, Hyun-Jin Cho |
2017-06-27 |
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Integrated circuits with self aligned contacts and methods of manufacturing the same |
Seowoo Nam, Yann Mignot, Jim Kelly, Raghuveer Patlotta, Theodorus E. Standaert |
2017-02-21 |
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Methods of producing integrated circuits with an air gap |
Errol Todd Ryan, Roderick A. Augur, Craig Child, Larry Zhao |
2016-08-30 |
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Copper based nitride liner passivation layers for conductive copper structures |
Xunyuan Zhang, Larry Zhao, Sean Xuan Lin, John A. Iacoponi, Errol Todd Ryan |
2016-04-19 |
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Moisture scavenging layer for thinner barrier application in beol integration |
Kunaljeet Tanwar |
2016-04-19 |
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Methods for fabricating integrated circuits using improved masks |
Seowoo Nam, Craig Child |
2015-10-20 |
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Electroless fill of trench in semiconductor structure |
Sean Xuan Lin, Xunyuan Zhang, Larry Zhao, John A. Iacoponi, Kunaljeet Tanwar |
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Methods for integration of pore stuffing material |
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Methods of self-forming barrier integration with pore stuffed ULK material |
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Semiconductor device having a self-forming barrier layer at via bottom |
Larry Zhao, Xunyuan Zhang, Sean Xuan Lin |
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Methods of forming copper-based nitride liner/passivation layers for conductive copper structures and the resulting device |
Xunyuan Zhang, Larry Zhao, Sean Xuan Lin, John A. Iacoponi, Errol Todd Ryan |
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Methods of forming copper-based conductive structures by forming a copper-based seed layer having an as-deposited thickness profile and thereafter performing an etching process and electroless copper deposition |
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Methods for fabricating integrated circuits with ruthenium-lined copper |
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Methods of forming copper-based conductive structures on an integrated circuit device |
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