Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12356665 | Stacked transistors having an isolation region therebetween and a common gate electrode, and related fabrication methods | Seungchan Yun, Inchan Hwang, Gunho Jo, Jeonghyuk Yim, Byounghak Hong +6 more | 2025-07-08 |
| 11978668 | Integrated circuit devices including a via and methods of forming the same | Harsono S. Simka, Anthony Dongick LEE, Seowoo Nam, Sang-Hoon Ahn | 2024-05-07 |
| RE49820 | Semiconductor device having a self-forming barrier layer at via bottom | Larry Zhao, Xunyuan Zhang, Sean Xuan Lin | 2024-01-30 |
| 11705363 | Fully aligned via integration with selective catalyzed vapor phase grown materials | Harsono S. Simka, Rebecca Park | 2023-07-18 |
| 10510675 | Substrate structure with spatial arrangement configured for coupling of surface plasmons to incident light | Somnath Ghosh, Eswar Ramanathan, Qanit Takmeel, Jeric Sarad, Ashwini Chandrashekar +4 more | 2019-12-17 |
| RE47630 | Semiconductor device having a self-forming barrier layer at via bottom | Larry Zhao, Xunyuan Zhang, Sean Xuan Lin | 2019-10-01 |
| 10199270 | Multi-directional self-aligned multiple patterning | Colin Bombardier, Vikrant Chauhan, Anbu Selvam KM Mahalingam, Keith Donegan | 2019-02-05 |
| 9691971 | Integrated circuits including magnetic tunnel junctions for magnetoresistive random-access memory and methods for fabricating the same | Seowoo Nam, Craig Child, Hyun-Jin Cho | 2017-06-27 |
| 9576852 | Integrated circuits with self aligned contacts and methods of manufacturing the same | Seowoo Nam, Yann Mignot, Jim Kelly, Raghuveer Patlotta, Theodorus E. Standaert | 2017-02-21 |
| 9431294 | Methods of producing integrated circuits with an air gap | Errol Todd Ryan, Roderick A. Augur, Craig Child, Larry Zhao | 2016-08-30 |
| 9318436 | Copper based nitride liner passivation layers for conductive copper structures | Xunyuan Zhang, Larry Zhao, Sean Xuan Lin, John A. Iacoponi, Errol Todd Ryan | 2016-04-19 |
| 9318437 | Moisture scavenging layer for thinner barrier application in beol integration | Kunaljeet Tanwar | 2016-04-19 |
| 9165770 | Methods for fabricating integrated circuits using improved masks | Seowoo Nam, Craig Child | 2015-10-20 |
| 9087881 | Electroless fill of trench in semiconductor structure | Sean Xuan Lin, Xunyuan Zhang, Larry Zhao, John A. Iacoponi, Kunaljeet Tanwar | 2015-07-21 |
| 9054052 | Methods for integration of pore stuffing material | Nicholas V. LiCausi, Errol Todd Ryan, Moosung Chae, Kunaljeet Tanwar, Larry Zhao +4 more | 2015-06-09 |
| 8932934 | Methods of self-forming barrier integration with pore stuffed ULK material | Moosung Chae, Errol Todd Ryan, Nicholas V. LiCausi, Christian Witt, Ailian Zhao +3 more | 2015-01-13 |
| 8907483 | Semiconductor device having a self-forming barrier layer at via bottom | Larry Zhao, Xunyuan Zhang, Sean Xuan Lin | 2014-12-09 |
| 8859419 | Methods of forming copper-based nitride liner/passivation layers for conductive copper structures and the resulting device | Xunyuan Zhang, Larry Zhao, Sean Xuan Lin, John A. Iacoponi, Errol Todd Ryan | 2014-10-14 |
| 8753975 | Methods of forming conductive copper-based structures using a copper-based nitride seed layer without a barrier layer and the resulting device | Xunyuan Zhang, Larry Zhao, Sean Xuan Lin, John A. Iacoponi, Errol Todd Ryan | 2014-06-17 |
| 8673766 | Methods of forming copper-based conductive structures by forming a copper-based seed layer having an as-deposited thickness profile and thereafter performing an etching process and electroless copper deposition | Sean Xuan Lin, Xunyuan Zhang, Larry Zhao | 2014-03-18 |
| 8586473 | Methods for fabricating integrated circuits with ruthenium-lined copper | Kunaljeet Tanwar, Xunyuan Zhang | 2013-11-19 |
| 8517769 | Methods of forming copper-based conductive structures on an integrated circuit device | Sean Xuan Lin, Xunyuan Zhang, Larry Zhao | 2013-08-27 |