Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11929290 | Method of manufacturing microelectronic components | Fabrice Nemouchi, Nicolas Posseme | 2024-03-12 |
| 9399753 | Aqua regia and hydrogen peroxide HCL combination to remove Ni and NiPt residues | Anh Duong, Olov Karlsson | 2016-07-26 |
| 9034746 | Gate silicidation | Joachim Patzer, Ardechir Pakfar, Dominic Thurmer | 2015-05-19 |
| 8946015 | Aqua regia and hydrogen peroxide HCI combination to remove Ni and NiPt residues | Anh Duong, Olov Karlsson | 2015-02-03 |
| 8906794 | Gate silicidation | Joachim Patzer, Ardechir Pakfar, Dominic Thurmer | 2014-12-09 |
| 8859408 | Stabilized metal silicides in silicon-germanium regions of transistor elements | Stefan Flachowsky, Tom Herrmann | 2014-10-14 |
| 8835318 | HNO3 single wafer clean process to strip nickel and for MOL post etch | Jochen Willi. Poth, Kristin Schupke | 2014-09-16 |
| 8835298 | NiSi rework procedure to remove platinum residuals | Sivakumar KUMARASAMY, Markus Lenski, Jochen Willi. Poth, Kristin Schupke | 2014-09-16 |
| 8815736 | Methods of forming metal silicide regions on semiconductor devices using different temperatures | Thilo Scheiper, Peter Javorka, Stefan Flachowsky | 2014-08-26 |
| 8809140 | Aqua regia and hydrogen peroxide HCl combination to remove Ni and NiPt residues | Anh Duong, Olov Karlsson | 2014-08-19 |
| 8765586 | Methods of forming metal silicide regions on semiconductor devices | Peter Baars, Markus Lenski | 2014-07-01 |
| 8761489 | Method and apparatus for characterizing discontinuities in semiconductor devices | Jochen Rinderknecht, Inka Richter | 2014-06-24 |
| 8518765 | Aqua regia and hydrogen peroxide HCl combination to remove Ni and NiPt residues | Anh Duong, Olov Karlsson | 2013-08-27 |
| 8513117 | Process to remove Ni and Pt residues for NiPtSi applications | Anh Duong, Sean Barstow, John Foster, Olov Karlsson, Bei Li +1 more | 2013-08-20 |
| 8293605 | Methods for fabricating a CMOS integrated circuit having a dual stress layer (DSL) | Peter Baars, Marco Lepper | 2012-10-23 |
| 8008729 | Integrated circuit with a contact structure including a portion arranged in a cavity of a semiconductor structure | Werner Graf | 2011-08-30 |
| 7679149 | Method of removing refractory metal layers and of siliciding contact areas | Audrey Beckert, Matthias Goldbach | 2010-03-16 |
| 7678654 | Buried bitline with reduced resistance | Christoph Kleint, Ulrike Bewersdorff-Sarlette, Christoph Ludwig, David Pritchard, Torsten Müller +1 more | 2010-03-16 |