MV

Maud Vinet

CEA: 88 patents #1 of 7,956Top 1%
SS Stmicroelectronics Sa: 25 patents #442 of 4,662Top 10%
IBM: 11 patents #9,995 of 70,183Top 15%
Globalfoundries: 3 patents #1,029 of 4,424Top 25%
SS Stmicroelectronics (Crolles 2) Sas: 3 patents #150 of 529Top 30%
CN CNRS: 2 patents #1,756 of 11,908Top 15%
📍 Grenoble, NY: #1 of 14 inventorsTop 8%
Overall (All Time): #17,853 of 4,157,543Top 1%
90
Patents All Time

Issued Patents All Time

Showing 51–75 of 90 patents

Patent #TitleCo-InventorsDate
9076732 Method to prepare semi-conductor device comprising a selective etching of a silicium—germanium layer Yannick Le Tiec, Laurent Grenouillet, Nicolas Posseme 2015-07-07
9070709 Method for producing a field effect transistor with implantation through the spacers Nicolas Posseme, Laurent Grenouillet, Yannick Le Tiec, Nicolas Loubet 2015-06-30
9059041 Dual channel hybrid semiconductor-on-insulator semiconductor devices Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Qing Liu, Laurent Grenouillet +1 more 2015-06-16
8994142 Field effect transistor with offset counter-electrode contact Laurent Grenouillet, Yannick Le Tiec, Nicolas Posseme 2015-03-31
8987854 Microelectronic device with isolation trenches extending under an active area Laurent Grenouillet, Yannick Le Tiec, Romain Wacquez 2015-03-24
8980702 Method of making a transistor Heimanu Niebojewski, Yves Morand 2015-03-17
8969966 Defective P-N junction for backgated fully depleted silicon on insulator MOSFET Kangguo Cheng, Bruce B. Doris, Laurent Grenouillet, Ali Khakifirooz, Yannick Le Tiec +1 more 2015-03-03
8969148 Method for producing a transistor structure with superimposed nanowires and with a surrounding gate Sylvain Barraud, Laurent Grenouillet 2015-03-03
8962399 Method of making a semiconductor layer having at least two different thicknesses Yves Morand, Heimanu Niebojewski 2015-02-24
8890219 UTBB CMOS imager having a diode junction in a photosensitive area thereof Laurent Grenouillet 2014-11-18
8877618 Method for producing a field effect transistor with a SiGe channel by ion implantation Laurent Grenouillet, Yannick Le Tiec, Romain Wacquez, Olivier Faynot 2014-11-04
8853785 Integrated circuit with electrostatically coupled MOS transistors and method for producing such an integrated circuit Emmanuel Augendre, Laurent Clavelier, Perrine Batude 2014-10-07
8735259 Method of producing insulation trenches in a semiconductor on insulator substrate Yannick Le Tiec, Laurent Grenouillet 2014-05-27
8729577 Light-emitting device with head-to-tail P-type and N-type transistors Laurent Grenouillet 2014-05-20
8722499 Method for fabricating a field effect device with weak junction capacitance Laurent Grenouillet, Yannick Le Tiec, Nicolas Posseme 2014-05-13
8703550 Dual shallow trench isolation liner for preventing electrical shorts Bruce B. Doris, Shom Ponoth, Prasanna Khare, Qing Liu, Nicolas Loubet 2014-04-22
8603872 Field effect device provided with a localized dopant diffusion barrier area and fabrication method Laurent Grenouillet, Yannick Le Tiec, Nicolas Posseme 2013-12-10
8399316 Method for making asymmetric double-gate transistors Olivier Thomas, Olivier Rozeau, Thierry Poiroux 2013-03-19
8324057 Method for fabricating asymmetric double-gate transistors by which asymmetric and symmetric double-gate transistors can be made on the same substrate Olivier Thomas, Olivier Rozeau, Thierry Poiroux 2012-12-04
8232168 Method for making asymmetric double-gate transistors by which asymmetric and symmetric double-gate transistors can be made on the same substrate Olivier Thomas, Olivier Rozeau, Thierry Poiroux 2012-07-31
8183630 Circuit with transistors integrated in three dimensions and having a dynamically adjustable threshold voltage VT Perrine Batude, Laurent Clavelier, Marie-Anne Jaud, Olivier Thomas 2012-05-22
8115503 Device for measuring metal/semiconductor contact resistivity 2012-02-14
8116118 Memory cell provided with dual-gate transistors, with independent asymmetric gates Olivier Thomas 2012-02-14
8105906 Method for fabricating asymmetric double-gate transistors by which asymmetric and symmetric double-gate transistors can be made on the same substrate Olivier Thomas, Olivier Rozeau, Thierry Poiroux 2012-01-31
8021934 Method for making a transistor with metallic source and drain Thierry Poiroux, Bernard Previtali 2011-09-20