Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12132001 | Semiconductor devices and methods of manufacturing semiconductor devices | Wei-Hsiung Tseng, Changhwa Kim | 2024-10-29 |
| 11804438 | Semiconductor devices and methods of manufacturing semiconductor devices | Wei-Hsiung Tseng, Changhwa Kim | 2023-10-31 |
| 11488826 | Self-aligned layer patterning | Boon Teik Chan, Juergen Boemmels | 2022-11-01 |
| 11335637 | Semiconductor devices and methods of manufacturing semiconductor devices | Wei-Hsiung Tseng, Changhwa Kim | 2022-05-17 |
| 10396034 | Semiconductor devices and methods of manufacturing semiconductor devices | Wei-Hsiung Tseng, Changhwa Kim | 2019-08-27 |
| 10079147 | Method of forming interconnects for semiconductor devices | Sung-yup Jung | 2018-09-18 |
| 9997402 | Method of manufacturing a wiring structure on a self-forming barrier pattern | — | 2018-06-12 |
| 9865594 | Semiconductor devices | Sang-Hoon Ahn | 2018-01-09 |
| 9793158 | Methods of fabricating a semiconductor device | Hyunsu Kim | 2017-10-17 |
| 8519445 | Poly profile engineering to modulate spacer induced stress for device enhancement | Vincent Ho, Wenhe Lin, Young Way Teh, Bei Chao Zhang, Fan Zhang +2 more | 2013-08-27 |
| 7993997 | Poly profile engineering to modulate spacer induced stress for device enhancement | Vincent Ho, Wenhe Lin, Young Way Teh, Bei Chao Zhang, Fan Zhang +2 more | 2011-08-09 |
| 7947604 | Method for corrosion prevention during planarization | Fan Zhang, Lup San Leong, Bei Chao Zhang | 2011-05-24 |
| 7833900 | Interconnections for integrated circuits including reducing an overburden and annealing | Lup San Leong, Liang-Choo Hsia | 2010-11-16 |
| 7670946 | Methods to eliminate contact plug sidewall slit | Beichao Zhang | 2010-03-02 |
| 7524755 | Entire encapsulation of Cu interconnects using self-aligned CuSiN film | Johnny Widodo, Bei Chao Zhang, Tong Qing Chen, Fan Zhang, San Leong Liew +2 more | 2009-04-28 |
| 7247555 | Method to control dual damascene trench etch profile and trench depth uniformity | Hai Cong, Liang-Choo Hsia | 2007-07-24 |
| 6406975 | Method for fabricating an air gap shallow trench isolation (STI) structure | Victor Lim, Young Way Teh, Ting Cheong Ang, Alex See | 2002-06-18 |
| 6380106 | Method for fabricating an air gap metallization scheme that reduces inter-metal capacitance of interconnect structures | Seng-Keong Victor Lim, Young Way Teh, Ting Cheong Ang, Alex See | 2002-04-30 |
| 6121135 | Modified buried contact process for IC device fabrication | Lap Chan | 2000-09-19 |