Issued Patents All Time
Showing 1–25 of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9029978 | Semiconductor trench structure having a silicon nitride layer overlaying an oxide layer | — | 2015-05-12 |
| 8309456 | Method and system for metal barrier and seed integration | — | 2012-11-13 |
| 8187950 | Method of eliminating micro-trenches during spacer etch | — | 2012-05-29 |
| 8110502 | Method of improving adhesion strength of low dielectric constant layers | — | 2012-02-07 |
| 8026151 | Method with high gapfill capability for semiconductor devices | — | 2011-09-27 |
| 7989309 | Method of improving a shallow trench isolation gapfill process | — | 2011-08-02 |
| 7910475 | Method for forming low dielectric constant fluorine-doped layers | — | 2011-03-22 |
| 7579271 | Method for forming low dielectric constant fluorine-doped layers | — | 2009-08-25 |
| 7456067 | Method with high gapfill capability for semiconductor devices | — | 2008-11-25 |
| 6963113 | Method of body contact for SOI MOSFET | Sang Yee Loong, Shyue Fong Quek, Jun Song | 2005-11-08 |
| 6833606 | Fabrication of a heterojunction bipolar transistor with integrated MIM capacitor | Hiroshi Nakamura, Kian Siong Ang, Subrata Halder, Geok Ng | 2004-12-21 |
| 6815823 | Copper metal structure for the reduction of intra-metal capacitance | Young Way Teh, Victor Lim | 2004-11-09 |
| 6803314 | Double-layered low dielectric constant dielectric dual damascene method | Shyue Fong Quek, Yee Chong Wong, Sang Yee Long | 2004-10-12 |
| 6787422 | Method of body contact for SOI mosfet | Sang Yee Loong, Shyue Fong Quek, Jun Song | 2004-09-07 |
| 6764914 | Method of forming a high K metallic dielectric layer | Alex See, Cher Liang Cha, Shyue Fong Quek, Wye Boon Loh, Sang Yee Loong +2 more | 2004-07-20 |
| 6737739 | Method of vacuum packaging a semiconductor device assembly | Shyue Fong Quek, Duay Ing Ong, Sang Yee Loong | 2004-05-18 |
| 6653674 | Vertical source/drain contact semiconductor | Shyue Fong Quek, Sang Yee Loong, Puay Ing Ong | 2003-11-25 |
| 6649517 | Copper metal structure for the reduction of intra-metal capacitance | Young Way Teh, Victor Lim | 2003-11-18 |
| 6611024 | Method of forming PID protection diode for SOI wafer | Shyue Fong Quek, Sang Yee Loong, Jun Song | 2003-08-26 |
| 6582856 | Simplified method of fabricating a rim phase shift mask | Shyue Fong Quek, Jun Song, Sang Yee Loong | 2003-06-24 |
| 6495399 | Method of vacuum packaging a semiconductor device assembly | Shyue Fong Quek, Duay Ing Ong, Sang Yee Loong | 2002-12-17 |
| 6492726 | Chip scale packaging with multi-layer flip chip arrangement and ball grid array interconnection | Shyue Fong Quek, Ying-Keung Leung, Sang Yee Loong | 2002-12-10 |
| 6492242 | Method of forming of high K metallic dielectric layer | Alex See, Cher Liang Cha, Shyuz Fong Quek, Wye Boon Loh, Sang Yee Loong +2 more | 2002-12-10 |
| 6486515 | ESD protection network used for SOI technology | Song Jun, Sang Yee Loong, Shyue Fong Quek | 2002-11-26 |
| 6465296 | Vertical source/drain contact semiconductor | Shyue Fong Quek, Sang Yee Loong, Puay Ing Ong | 2002-10-15 |