TA

Ting Cheong Ang

CM Chartered Semiconductor Manufacturing: 39 patents #11 of 840Top 2%
S( Semiconductor Manufacturing International (Shanghai): 9 patents #50 of 1,122Top 5%
DP Denselight Semiconductors Pte: 1 patents #12 of 22Top 55%
NS Nanyang Technological University Of Singapore: 1 patents #4 of 17Top 25%
📍 Singapore, SG: #72 of 13,971 inventorsTop 1%
Overall (All Time): #56,765 of 4,157,543Top 2%
49
Patents All Time

Issued Patents All Time

Showing 26–49 of 49 patents

Patent #TitleCo-InventorsDate
6455384 Method for forming MOSFET device having source/drain extension regions located underlying L shaped spacers Shyue Fong Quek, Jun Song, Xing Yu 2002-09-24
6416909 Alternating phase shift mask and method for fabricating the alignment monitor Shyue Fong Quek, Swee Hong Choo, Sang Yee Loong 2002-07-09
6406948 Method for forming an ESD protection network for SOI technology with the ESD device formed in an underlying silicon substrate Song Jun, Sang Yee Loong, Shyue Fong Quek 2002-06-18
6406975 Method for fabricating an air gap shallow trench isolation (STI) structure Victor Lim, Young Way Teh, Alex See, Yong Kong Siew 2002-06-18
6406994 Triple-layered low dielectric constant dielectric dual damascene approach Shyue Fong Quek, Yee Chong Wong, Sang Yee Loong 2002-06-18
6399431 ESD protection device for SOI technology Jun Song, Shyue Fong Quek, Sang Yee Loong 2002-06-04
6380106 Method for fabricating an air gap metallization scheme that reduces inter-metal capacitance of interconnect structures Seng-Keong Victor Lim, Young Way Teh, Alex See, Yong Kong Siew 2002-04-30
6376319 Process to fabricate a source-drain extension Shyue Fong Quek, Jun Song, Xing Yu 2002-04-23
6376379 Method of hard mask patterning Shyue Fong Quek, Jun Song, Sang Yee Loong 2002-04-23
6329253 Thick oxide MOS device used in ESD protection circuit Jun Song, Yonqzang Zhang, Shyue Fong Quek, Jun Cai, Puay Ing Ong 2001-12-11
6319783 Process to fabricate a novel source-drain extension Shyue Pong Quek, Jun Song, Xing Yu 2001-11-20
6303414 Method of forming PID protection diode for SOI wafer Shyue Fong Quek, Sang Yee Loong, Jun Song 2001-10-16
6300172 Method of field isolation in silicon-on-insulator technology Shyue Pong Quek, Lap Chan, Sang Yee Loong 2001-10-09
6284609 Method to fabricate a MOSFET using selective epitaxial growth to form lightly doped source/drain regions Shyue Fong Quek, Puay Ing Ong, Sang Yee Loong 2001-09-04
6275089 Low voltage controllable transient trigger network for ESD protection Jun Song, Shyue Fong Quek, Lap Chan 2001-08-14
6261917 High-K MOM capacitor Shyue Fong Quek, Sang Yee Loong, Puay Ing Ong 2001-07-17
6258677 Method of fabricating wedge isolation transistors Shyue Fong Quek, Sang Yee Loong, Jun Song 2001-07-10
6252290 Method to form, and structure of, a dual damascene interconnect device Shyue Fong Quek, Lap Chan, Sang Yee Loong 2001-06-26
6248618 Method of fabrication of dual gate oxides for CMOS devices Shyue Fong Quek, Puay Ing Ong, Sang Yee Loong 2001-06-19
6214680 Method to fabricate a sub-quarter-micron MOSFET with lightly doped source/drain regions Shyue Fong Quek, Puay Ink Ong, Sang Yee Loong 2001-04-10
6177324 ESD protection device for STI deep submicron technology Jun Song, Shyue Fong Quek, Lap Chan 2001-01-23
6143598 Method of fabrication of low leakage capacitor John E. Martin, Lap Chan, John Sudijono 2000-11-07
6110787 Method for fabricating a MOS device Lap Chan, Shyue Pong Quek, Sang Yee Loong 2000-08-29
6090691 Method for forming a raised source and drain without using selective epitaxial growth Shyue Fong Quek, Xing Yu, Ying-Keung Leung 2000-07-18