Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
WH

Wenting Hou — 11 Patents

Applied Materials: 10 patents #1,301 of 7,310Top 20%
SYSynopsys: 1 patents #1,143 of 2,302Top 50%
San Jose, CA: #5,902 of 32,062 inventorsTop 20%
California: #56,011 of 386,348 inventorsTop 15%
Overall (All Time): #435,149 of 4,157,543Top 15%
11 Patents All Time
Wenting Hou has been granted 11 US patents while listed as an inventor at Applied Materials. The first was granted in 2012 and the most recent in August 2025. Wenting Hou ranks #435,149 of 4,157,543 US inventors in our database (top 10.5%). Patent records list Wenting Hou in San Jose, CA, US.

Patents per Year

Patents granted per year, 2012 to 2025Bar chart with a peak of 3 patents in 2023.peak 32012: 1 patents20122019: 1 patents20192020: 1 patents20202021: 1 patents20212022: 2 patents20222023: 3 patents20232024: 1 patents20242025: 1 patents2025

Issued Patents All Time

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12387978 Ru liner above a barrier layer Zhaoxuan Wang, Jianxin Lei, Sung-Kwan Kang, Anand Iyer 2025-08-12
11908696 Methods and devices for subtractive self-alignment He Ren, Hao Jiang, Mehul Naik, Jianxin Lei, Chen Gong +1 more 2024-02-20 $66,055,000
11655534 Apparatus for reducing tungsten resistivity Jianxin Lei, Jothilingam Ramalingam, Prashanth Kothnur, William Johanson 2023-05-23 $53,064,000
11637107 Silicon-containing layer for bit line resistance reduction Tom Ho Wing Yu, Nobuyuki Sasaki, Jianxin Lei, Rongjun Wang, Tza-Jing Gung 2023-04-25 $46,789,000
11626410 Silicon-containing layer for bit line resistance reduction Tom Ho Wing Yu, Nobuyuki Sasaki, Jianxin Lei, Rongjun Wang, Tza-Jing Gung 2023-04-11 $32,726,000
11447857 Methods and apparatus for reducing tungsten resistivity Jianxin Lei, Jothilingam Ramalingam, Prashanth Kothnur, William Johanson 2022-09-20 $25,949,000
11257677 Methods and devices for subtractive self-alignment He Ren, Hao Jiang, Mehul Naik, Jianxin Lei, Chen Gong +1 more 2022-02-22 $169,194,000
10950500 Methods and apparatus for filling a feature disposed in a substrate Roey Shaviv, Xikun Wang, Ismail Emesh, Jianxin Lei 2021-03-16 $56,717,000
10700072 Cap layer for bit line resistance reduction Priyadarshi Panda, Jianxin Lei, Mihaela Balseanu, Ning Li, Sanjay Natarajan +4 more 2020-06-30 $26,020,000
10304732 Methods and apparatus for filling substrate features with cobalt Jianxin Lei, Joung Joo Lee, Rong Tao 2019-05-28 $34,437,000
8099702 Method and apparatus for proximate placement of sequential cells Pei-Hsin Ho 2012-01-17 $3,995,000