Issued Patents All Time
Showing 26–50 of 81 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9978644 | Semiconductor device and manufacturing method | — | 2018-05-22 |
| 9875980 | Copper pillar sidewall protection | Dean Zehnder, Christopher J. Berry, Robert Lanzone, Ludovico E. Bancod | 2018-01-23 |
| 9865565 | Transient interface gradient bonding for metal bonds | — | 2018-01-09 |
| 9837376 | Manufacturing method of semiconductor device and semiconductor device thereof | Yeong Beom Ko, Jin Han Kim, Dong Jin Kim, Do Hyung Kim | 2017-12-05 |
| 9627368 | Semiconductor device using EMC wafer support system and fabricating method thereof | Jin Young Kim, Doo Hyun Park, Ju Hoon Yoon, Seong Min Seo, Choon Heung Lee | 2017-04-18 |
| 9524906 | Semiconductor device and manufacturing method thereof | Jong Sik Paek, Eun Sook Sohn, In Bae Park, Won Chul Do | 2016-12-20 |
| 9490231 | Manufacturing method of semiconductor device and semiconductor device thereof | Yeong Beom Ko, Jin Han Kim, Dong Jin Kim, Do Hyung Kim | 2016-11-08 |
| 9412729 | Semiconductor package and fabricating method thereof | Ji Young Chung, Choon Heung Lee, Byong Jin Kim | 2016-08-09 |
| 9406639 | Semiconductor package and manufacturing method thereof | Jin Young Kim, No Sun Park, Yoon Joo Kim, Choon Heung Lee, Jin Han Kim +3 more | 2016-08-02 |
| 8643177 | Wafers including patterned back side layers thereon | Kevin Engel, Julia Roe, Christopher J. Berry | 2014-02-04 |
| 8487432 | Electronic structures including barrier layers and/or oxidation barriers defining lips and related methods | J. Daniel Mis | 2013-07-16 |
| 8362612 | Semiconductor device and manufacturing method thereof | Jong Sik Paek, Eun Sook Sohn, In Bae Park, Won Chul Do | 2013-01-29 |
| 8294269 | Electronic structures including conductive layers comprising copper and having a thickness of at least 0.5 micrometers | Krishna K. Nair, William E. Batchelor | 2012-10-23 |
| 7994043 | Lead free alloy bump structure and fabrication method | J. Daniel Mis | 2011-08-09 |
| 7932615 | Electronic devices including solder bumps on compliant dielectric layers | — | 2011-04-26 |
| 7879715 | Methods of forming electronic structures including conductive shunt layers and related structures | Krishna K. Nair, William E. Batchelor | 2011-02-01 |
| 7871899 | Methods of forming back side layers for thinned wafers | Kevin Engel, Julia Roe, Chirstopher John Berry | 2011-01-18 |
| 7839000 | Solder structures including barrier layers with nickel and/or copper | J. Daniel Mis, Gretchen Adema, Susan Bumgarner, Pooja Chilukuri, Christine Rinne | 2010-11-23 |
| 7834454 | Electronic structures including barrier layers defining lips | J. Daniel Mis | 2010-11-16 |
| 7755164 | Capacitor and resistor having anodic metal and anodic metal oxide structure | — | 2010-07-13 |
| 7674701 | Methods of forming metal layers using multi-layer lift-off patterns | — | 2010-03-09 |
| 7659621 | Solder structures for out of plane connections | — | 2010-02-09 |
| 7547623 | Methods of forming lead free solder bumps | J. Daniel Mis, Gretchen Adema, Susan Bumgarner, Pooja Chilukuri, Christine Rinne | 2009-06-16 |
| 7531898 | Non-Circular via holes for bumping pads and related structures | William E. Batchelor | 2009-05-12 |
| 7495326 | Stacked electronic structures including offset substrates | — | 2009-02-24 |