Issued Patents All Time
Showing 76–97 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6051882 | Subtractive dual damascene semiconductor device | Steven C. Avanzino, Subhash Gupta, Rich Klein, Ming-Rin Lin | 2000-04-18 |
| 6025240 | Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices | Vei-Han Chan, Mark Randolph, Nicholas H. Tripsas, Daniel Sobek, Janet Wang +2 more | 2000-02-15 |
| 6015736 | Method and system for gate stack reoxidation control | Mark Randolph | 2000-01-18 |
| 6005279 | Trench edge spacer formation | — | 1999-12-21 |
| 5998272 | Silicidation and deep source-drain formation prior to source-drain extension formation | Emi Ishida, Dong-Hyuk Ju | 1999-12-07 |
| 5989963 | Method for obtaining a steep retrograde channel profile | David C. Greenlaw, Jonathan Fewkes | 1999-11-23 |
| 5952693 | CMOS semiconductor device comprising graded junctions with reduced junction capacitance | David Wu | 1999-09-14 |
| 5935867 | Shallow drain extension formation by angled implantation | Roger Alvis, Peter Griffin | 1999-08-10 |
| 5888867 | Non-uniform threshold voltage adjustment in flash eproms through gate work function alteration | Janet Wang, Vei-Han Chan, Nicholas H. Tripsas | 1999-03-30 |
| 5854132 | Method for exposing photoresist | Shekhar Pramanick, Jonathon Fewkes | 1998-12-29 |
| 5795823 | Self aligned via dual damascene | Steven C. Avanzino, Subhash Gupta, Rich Klein, Ming-Ren Lin | 1998-08-18 |
| 5770519 | Copper reservoir for reducing electromigration effects associated with a conductive via in a semiconductor device | Richard K. Klein, Darrell M. Erb, Steven C. Avanzino, Robin Cheung, Bryan Tracy +2 more | 1998-06-23 |
| 5705430 | Dual damascene with a sacrificial via fill | Steven C. Avanzino, Subhash Gupta, Rich Klein, Ming-Ren Lin | 1998-01-06 |
| 5691238 | Subtractive dual damascene | Steven C. Avanzino, Subhash Gupta, Rich Klein, Ming-Ren Lin | 1997-11-25 |
| 5686354 | Dual damascene with a protective mask for via etching | Steven C. Avanzino, Subhash Gupta, Rich Klein, Ming-Ren Lin | 1997-11-11 |
| 5652447 | Flash EEPROM memory with reduced column leakage current | Jian Chen, Yuan Tang, Salvatore F. Cagnina | 1997-07-29 |
| 5650343 | Self-aligned implant energy modulation for shallow source drain extension formation | Roger Alvis | 1997-07-22 |
| 5646448 | Copper pellet for reducing electromigration effects associated with a conductive via in a semiconductor device | Richard K. Klein, Darrell M. Erb, Steven C. Avanzino, Robin Cheung, Bryan Tracy +2 more | 1997-07-08 |
| 5639691 | Copper pellet for reducing electromigration effects associated with a conductive via in a semiconductor device | Richard K. Klein, Darrell M. Erb, Steven C. Avanzino, Robin Cheung, Bryan Tracy +2 more | 1997-06-17 |
| 5626967 | Structure and method for exposing photoresist | Shekhar Pramanick, Jonathon Fewkes | 1997-05-06 |
| 5614765 | Self aligned via dual damascene | Steven C. Avanzino, Subhash Gupta, Rich Klein, Ming-Ren Lin | 1997-03-25 |
| 5482881 | Method of making flash EEPROM memory with reduced column leakage current | Jian Chen, Yuan Tang, Salvatore F. Cagnina | 1996-01-09 |