Issued Patents All Time
Showing 101–125 of 205 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6734527 | CMOS devices with balanced drive currents based on SiGe | — | 2004-05-11 |
| 6730576 | Method of forming a thick strained silicon layer and semiconductor structures incorporating a thick strained silicon layer | Haihong Wang, Paul R. Besser, Jung-Suk Goo, Minh Van Ngo, Eric N. Paton | 2004-05-04 |
| 6727534 | Electrically programmed MOS transistor source/drain series resistance | James F. Buller, Derick J. Wristers | 2004-04-27 |
| 6709960 | Laser anneal process for reduction of polysilicon depletion | — | 2004-03-23 |
| 6707106 | Semiconductor device with tensile strain silicon introduced by compressive material in a buried oxide layer | Derick J. Wristers, James F. Buller | 2004-03-16 |
| 6703648 | Strained silicon PMOS having silicon germanium source/drain extensions and method for its fabrication | Eric N. Paton, Haihong Wang | 2004-03-09 |
| 6696348 | Wide neck shallow trench isolation region to prevent strain relaxation at shallow trench isolation region edges | — | 2004-02-24 |
| 6682973 | Formation of well-controlled thin SiO, SiN, SiON layer for multilayer high-K dielectric applications | Eric N. Paton, Bin Yu | 2004-01-27 |
| 6680250 | Formation of deep amorphous region to separate junction from end-of-range defects | Eric N. Paton, Robert B. Ogle, Cyrus E. Tabery, Bin Yu | 2004-01-20 |
| 6680233 | Semiconductor device formed with disposable spacer and liner using high-K material and method of fabrication | Bin Yu, Haihong Wang | 2004-01-20 |
| 6660578 | High-K dielectric having barrier layer for P-doped devices and method of fabrication | Olov Karlsson, Haihong Wang, Bin Yu, Zoran Krivokapic | 2003-12-09 |
| 6657276 | Shallow trench isolation (STI) region with high-K liner and method of formation | Olov Karlsson, Haihong Wang, Bin Yu, Zoran Krivokapic | 2003-12-02 |
| 6657267 | Semiconductor device and fabrication technique using a high-K liner for spacer etch stop | Olov Karlsson, Haihong Wang, Bin Yu | 2003-12-02 |
| 6657223 | Strained silicon MOSFET having silicon source/drain regions and method for its fabrication | Haihong Wang | 2003-12-02 |
| 6656749 | In-situ monitoring during laser thermal annealing | Eric N. Paton, Robert B. Ogle, Bin Yu, Cyrus E. Tabery | 2003-12-02 |
| 6642590 | Metal gate with PVD amorphous silicon layer and barrier layer for CMOS devices and method of making with a replacement gate process | Paul R. Besser, Matthew S. Buynoski | 2003-11-04 |
| 6642536 | Hybrid silicon on insulator/bulk strained silicon technology | Akif Sultan | 2003-11-04 |
| 6630720 | Asymmetric semiconductor device having dual work function gate and method of fabrication | Witold P. Maszara, Haihong Wang | 2003-10-07 |
| 6624476 | Semiconductor-on-insulator (SOI) substrate having selective dopant implant in insulator layer and method of fabricating | Simon S. Chan, Matthew S. Buynoski | 2003-09-23 |
| 6602781 | Metal silicide gate transistors | Paul R. Besser, Matthew S. Buynoski, John Foster, Paul L. King, Eric N. Paton | 2003-08-05 |
| 6600170 | CMOS with strained silicon channel NMOS and silicon germanium channel PMOS | — | 2003-07-29 |
| 6589866 | Metal gate with PVD amorphous silicon layer having implanted dopants for CMOS devices and method of making with a replacement gate process | Paul R. Besser, Matthew S. Buynoski | 2003-07-08 |
| 6586808 | Semiconductor device having multi-work function gate electrode and multi-segment gate dielectric | Witold P. Maszara, Haihong Wang | 2003-07-01 |
| 6583488 | Low density, tensile stress reducing material for STI trench fill | — | 2003-06-24 |
| 6583012 | Semiconductor devices utilizing differently composed metal-based in-laid gate electrodes | Matthew S. Buynoski, Paul R. Besser | 2003-06-24 |