Issued Patents 2020
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10879120 | Self aligned via and method for fabricating the same | Chih-Liang Chen, Cheng-Chi Chuang, Chia-Tien Wu, Charles Chew-Yuen Young, Jiann-Tyng Tzeng +4 more | 2020-12-29 |
| 10878162 | Metal with buried power for increased IC device density | Shih-Wei Peng, Hui-Ting Yang, Jiann-Tyng Tzeng, Wei-Cheng Lin | 2020-12-29 |
| 10878161 | Method and structure to reduce cell width in integrated circuits | Shih-Wei Peng, Jiann-Tyng Tzeng, Wei-Cheng Lin | 2020-12-29 |
| 10867833 | Buried metal for FinFET device and method | Lei-Chun Chou, Chih-Liang Chen, Jiann-Tyng Tzeng, Ru-Gun Liu, Charles Chew-Yuen Young | 2020-12-15 |
| 10867102 | Inverted pitch IC structure, layout method, and system | Shih-Wei Peng, Charles Chew-Yuen Young, Jiann-Tyng Tzeng, Wei-Cheng Lin | 2020-12-15 |
| 10861790 | Power strap structure for high performance and low current density | Chih-Liang Chen, Charles Chew-Yuen Young, Chi-Yeh Yu, Jiann-Tyng Tzeng, Kam-Tou Sio +6 more | 2020-12-08 |
| 10847460 | Advanced metal connection with metal cut | Chih-Liang Chen, Cheng-Chi Chuang, Chia-Tien Wu, Charles Chew-Yuen Young, Hui-Ting Yang +6 more | 2020-11-24 |
| RE48306 | Stair exerciser apparatus | Mrako A. Fenster, Derek Nelson, Kung-Lung Lai, Chieh-Wen Lin, Ming-Hsin Chi +2 more | 2020-11-17 |
| 10833061 | Semiconductor device including source/drain contact having height below gate stack | Charles Chew-Yuen Young, Chih-Liang Chen, Jiann-Tyng Tzeng, Shun Li Chen, Kam-Tou Sio +3 more | 2020-11-10 |
| 10817635 | Multiple patterning method for semiconductor devices | Ken-Hsien Hsieh, Ru-Gun Liu, Wen-Chun Huang, Wen-Li Cheng, Pai-Wei Wang | 2020-10-27 |
| 10790155 | Method of manufacturing semiconductor devices | Ru-Gun Liu, Wei-Liang Lin, Yung-Sung Yen, Ken-Hsien Hsieh, Chin-Hsiang Lin | 2020-09-29 |
| 10784168 | Dummy MOL removal for performance enhancement | Hui-Ting Yang, Chun-Kuang Chen, Chih-Liang Chen, Charles Chew-Yuen Young, Jiann-Tyng Tzeng +4 more | 2020-09-22 |
| 10784869 | Integrated circuit and method of manufacturing the same | Shih-Wei Peng, Cheng-Chi Chuang, Jiann-Tyng Tzeng, Wei-Cheng Lin | 2020-09-22 |
| 10770304 | Hybrid double patterning method for semiconductor manufacture | Ken-Hsien Hsieh, Wen-Li Cheng, Dong-Yo Jheng, Ru-Gun Liu | 2020-09-08 |
| 10770303 | Mechanisms for forming patterns using multiple lithography processes | Shih-Ming Chang, Ming-Feng Shieh, Ru-Gun Liu, Tsai-Sheng Gau | 2020-09-08 |
| 10763365 | Metal rail conductors for non-planar semiconductor devices | Chih-Liang Chen, Ching-Wei Tsai, Charles Chew-Yuen Young, Jiann-Tyng Tzeng, Kuo-Cheng Ching +5 more | 2020-09-01 |
| 10734321 | Integrated circuit and method of manufacturing same | Pochun Wang, Ting-Wei Chiang, Hui-Zhong Zhuang, Jung-Chan Yang, Ru-Gun Liu +6 more | 2020-08-04 |
| 10727113 | Methods of forming metal layer structures in semiconductor devices | Ethan Hsiao, Chien-Wen Lai, Yi-Hsiung Lin, Cheng-Chi Chuang, Hsin-Ping Chen +1 more | 2020-07-28 |
| 10714485 | Semiconductor device which includes Fins | Chih-Liang Chen, Charles Chew-Yuen Young, Chin-Yuan Tseng, Jiann-Tyng Tzeng, Kam-Tou Sio +3 more | 2020-07-14 |
| 10707601 | Memory socket protecting cover and memory socket assembly | Yung-Shun Kao, Chung-Wei Chiang | 2020-07-07 |
| 10665467 | Spacer etching process for integrated circuit design | Ru-Gun Liu, Cheng-Hsiung Tsai, Chung-Ju Lee, Chia-Ying Lee, Jyu-Horng Shieh +6 more | 2020-05-26 |
| 10565348 | System for and method of fabricating an integrated circuit | Wei-Cheng Lin, Chih-Liang Chen, Charles Chew-Yuen Young, Jiann-Tyng Tzeng, Kam-Tou Sio +3 more | 2020-02-18 |