Issued Patents 2020
Showing 1–25 of 44 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10879238 | Negative capacitance finFET and method of fabricating thereof | Kuan-Lun Cheng, Chih-Hao Wang, Sai-Hooi Yeong, Tzer-Min Shen, Chi-Hsing Hsu | 2020-12-29 |
| 10879351 | Fill fins for semiconductor devices | Kuan-Lun Cheng, Chih-Hao Wang | 2020-12-29 |
| 10879242 | Method of manufacturing semiconductor device on hybrid substrate | Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang | 2020-12-29 |
| 10872891 | Integrated circuits with gate cut features | Zhi-Chang Lin, Wei-Hao Wu, Jia-Ni Yu, Chih-Hao Wang | 2020-12-22 |
| 10868001 | Semiconductor device and manufacturing method thereof | Chih-Hao Wang, Chih-Liang Chen, Shi Ning Ju | 2020-12-15 |
| 10861952 | Methods of manufacturing gate-all-around (GAA) FETs through partial replacement of gate spacers | Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang | 2020-12-08 |
| 10854721 | Semiconductor device with silicide | Jean-Pierre Colinge, Ta-Pen Guo, Carlos H. Diaz | 2020-12-01 |
| 10847513 | Buried interconnect conductor | Shi Ning Ju, Kuan-Ting Pan, Kuan-Lun Cheng, Chih-Hao Wang | 2020-11-24 |
| 10847426 | FinFET devices and methods of forming the same | Chih-Hao Wang, Jui-Chien Huang, Chun-Hsiung Lin, Pei-Hsun Wang | 2020-11-24 |
| 10833084 | Semiconductor device and fabricating the same | Ting-Hung Hsu | 2020-11-10 |
| 10833003 | Integrated circuits with backside power rails | Chih-Chao Chou, Shi Ning Ju, Wen-Ting Lan, Chih-Hao Wang | 2020-11-10 |
| 10825918 | Semiconductor device structure and method for forming the same | Zhi-Chang Lin, Kuan-Ting Pan, Chih-Hao Wang, Shi Ning Ju | 2020-11-03 |
| 10825919 | Methods of fabricating semiconductor devices having gate-all-around structure with inner spacer last process | Chun-Hsiung Lin, Pei-Hsun Wang, Chih-Hao Wang, Jui-Chien Huang | 2020-11-03 |
| 10818658 | Integrated circuit with a gate structure and method making the same | Ying-Keung Leung, Chi On Chui | 2020-10-27 |
| 10811317 | Method for manufacturing nanostructure with various widths | Shi Ning Ju, Kuan-Lun Cheng, Chih-Hao Wang | 2020-10-20 |
| 10811509 | Multi-gate device and method of fabrication thereof | Ching-Fang Huang, Carlos H. Diaz, Chih-Hao Wang, Wen-Hsing Hsieh, Ying-Keung Leung | 2020-10-20 |
| 10804381 | Structure and method for FinFET device with buried sige oxide | Carlos H. Diaz, Chih-Hao Wang, Zhiqiang Wu | 2020-10-13 |
| 10790280 | Multi-gate device and method of fabrication thereof | Chung-Cheng Wu, Ching-Fang Huang, Wen-Hsing Hsieh, Ying-Keung Leung, Cheng-Ting Chung | 2020-09-29 |
| 10777554 | Semiconductor device and fabricating the same | Ting-Hung Hsu | 2020-09-15 |
| 10763365 | Metal rail conductors for non-planar semiconductor devices | Chih-Liang Chen, Chih-Ming Lai, Ching-Wei Tsai, Charles Chew-Yuen Young, Jiann-Tyng Tzeng +5 more | 2020-09-01 |
| 10763255 | Semiconductor device and manufacturing method thereof | Shi Ning Ju, Chih-Hao Wang | 2020-09-01 |
| 10755943 | Method for manufacturing semiconductor device | Jung-Hao Chang, Chao-Hsien Huang, Wen-Ting Lan, Shi Ning Ju, Li-Te Lin | 2020-08-25 |
| 10741672 | Gate structure for semiconductor device | Chih-Hao Wang, Ching-Wei Tsai, Kuan-Lun Cheng | 2020-08-11 |
| 10720503 | Method for manufacturing semiconductor device | Shi Ning Ju, Kuan-Lun Cheng, Chih-Hao Wang | 2020-07-21 |
| 10714394 | Fin isolation structures of semiconductor devices | Chih-Hao Wang, Kuan-Lun Cheng, Yen-Ming Chen | 2020-07-14 |