Issued Patents 2020
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10868150 | Devices including gate spacer with gap or void and methods of forming the same | Kuo-Cheng Chiang, Ching-Wei Tsai, Chi-Wen Liu | 2020-12-15 |
| 10818658 | Integrated circuit with a gate structure and method making the same | Kuo-Cheng Ching, Chi On Chui | 2020-10-27 |
| 10811509 | Multi-gate device and method of fabrication thereof | Kuo-Cheng Ching, Ching-Fang Huang, Carlos H. Diaz, Chih-Hao Wang, Wen-Hsing Hsieh | 2020-10-20 |
| 10790280 | Multi-gate device and method of fabrication thereof | Kuo-Cheng Ching, Chung-Cheng Wu, Ching-Fang Huang, Wen-Hsing Hsieh, Cheng-Ting Chung | 2020-09-29 |
| 10763368 | Stacked gate-all-around FinFET and method forming the same | Kuo-Cheng Chiang, Chi-Wen Liu | 2020-09-01 |
| 10727314 | FinFET with a semiconductor strip as a base | Kuo-Cheng Chiang, Shi Ning Ju, Ching-Wei Tsai, Chih-Hao Wang, Carlos H. Diaz | 2020-07-28 |
| 10665718 | Wrap Around Silicide for FinFETs | Kuo-Cheng Chiang, Chi-Wen Liu | 2020-05-26 |
| 10665691 | Semiconductor structure | Kuo-Cheng Ching, Shi Ning Ju, Chih-Hao Wang | 2020-05-26 |
| 10651171 | Integrated circuit with a gate structure and method making the same | Kuo-Cheng Ching, Chi On Chui | 2020-05-12 |