Issued Patents 2020
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10879229 | Integrated circuit, system for and method of forming an integrated circuit | Kam-Tou Sio, Chih-Liang Chen, Charles Chew-Yuen Young, Jiann-Tyng Tzeng, Yi-Hsun Chiu | 2020-12-29 |
| 10868008 | Double rule integrated circuit layouts for a dual transmission gate | Shih-Wei Peng, Jiann-Tyng Tzeng, Li-Chun Tien, Pin-Dai Sue, Wei-Cheng Lin | 2020-12-15 |
| 10867986 | Semiconductor device having fin structure | Shun Li Chen, Chung-Te Lin, Pin-Dai Sue, Jung-Chan Yang | 2020-12-15 |
| 10867114 | Integrated circuit and method of forming an integrated circuit | Ting-Wei Chiang, Lee-Chung Lu, Li-Chun Tien, Shun Li Chen | 2020-12-15 |
| 10867104 | Isolation circuit between power domains | Chi-Yu Lu, Ting-Wei Chiang, Pin-Dai Sue, Jerry Chang Jui Kao, Yu-Ti Su +2 more | 2020-12-15 |
| 10867100 | Integrated circuit designing system | Shang-Chih Hsieh, Ting-Wei Chiang, Chun-Fu Chen, Hsiang-Jen Tseng | 2020-12-15 |
| 10867099 | System for designing integrated circuit layout and method of making the integrated circuit layout | Shang-Chih Hsieh, Ting-Wei Chiang, Chun-Fu Chen, Hsiang-Jen Tseng | 2020-12-15 |
| 10854499 | Integrated circuit, system for and method of forming an integrated circuit | Jung-Chan Yang, Ting-Wei Chiang, Cheng-I Huang, Chi-Yu Lu, Stefan Rusu | 2020-12-01 |
| 10797078 | Hybrid fin field-effect transistor cell structures and related methods | Wei-An Lai, Jiann-Tyng Tzeng, Wei-Cheng Lin, Lipen Yuan, Yan-Hao Chen | 2020-10-06 |
| 10783313 | Method for improved cut metal patterning | Kuang-Ching Chang, Ting-Wei Chiang, Jung-Chan Yang | 2020-09-22 |
| 10740531 | Integrated circuit, system for and method of forming an integrated circuit | Jung-Chan Yang, Ting-Wei Chiang, Jerry Chang Jui Kao, Lee-Chung Lu, Li-Chun Tien +3 more | 2020-08-11 |
| 10734321 | Integrated circuit and method of manufacturing same | Pochun Wang, Ting-Wei Chiang, Chih-Ming Lai, Jung-Chan Yang, Ru-Gun Liu +6 more | 2020-08-04 |
| 10734377 | Integrated circuit, system for and method of forming an integrated circuit | Kam-Tou Sio, Chih-Liang Chen, Charles Chew-Yuen Young, Jiann-Tyng Tzeng, Yi-Hsun Chiu | 2020-08-04 |
| 10727177 | Semiconductor device and layout design thereof | Chung-Te Lin, Ting-Wei Chiang, Li-Chun Tien, Pin-Dai Sue | 2020-07-28 |
| 10707199 | Integrated circuit layout and method of configuring the same | Chung-Te Lin, Ting-Wei Chiang, Pin-Dai Sue, Li-Chun Tien | 2020-07-07 |
| 10691849 | Metal cut optimization for standard cells | Cheok-Kei Lei, Chi-Lin Liu, Zhe-Wei Jiang, Chi-Yu Lu, Yi-Hsin Ko | 2020-06-23 |
| 10685162 | Layout for integrated circuit and the integrated circuit | Cheok-Kei Lei, Yu Li, Chia-Wei Tseng, Zhe-Wei Jiang, Chi-Lin Liu +3 more | 2020-06-16 |
| 10685982 | Semiconductor structure | Hsueh-Chih Chou, Chia Hao Tu, Sang Hoo Dhong, Lee-Chung Lu, Li-Chun Tien +1 more | 2020-06-16 |
| 10678977 | Semiconductor device having engineering change order (ECO) cells | Mao-Wei Chiu, Ting-Wei Chiang, Li-Chun Tien, Chi-Yu Lu | 2020-06-09 |
| 10664639 | Cell layout and structure | Tung-Heng Hsieh, Sheng-Hsiung Wang, Yu-Cheng Yeh, Tsung-Chieh Tsai, Juing-Yi Wu +2 more | 2020-05-26 |
| 10553575 | Semiconductor device having engineering change order (ECO) cells and method of using | Li-Chun Tien, Ya-Chi Chou, Chun-Fu Chen, Ting-Wei Chiang, Hsiang-Jen Tseng | 2020-02-04 |
| 10530345 | Flip-flop with delineated layout for reduced footprint | Chi-Lin Liu, Ting-Wei Chiang, Jerry Chang Jui Kao, Lee-Chung Lu, Shang-Chih Hsieh +1 more | 2020-01-07 |