Issued Patents 2017
Showing 26–38 of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9660064 | Low sheet resistance GaN channel on Si substrates using InAlN and AlGaN bi-layer capping stack | Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Seung Hoon Sung, Benjamin Chu-Kung +1 more | 2017-05-23 |
| 9653548 | Non-planar semiconductor device having group III-V material active region with multi-dielectric gate stack | Gilbert Dewey, Ravi Pillarisetty, Benjamin Chu-Kung, Niloy Mukherjee | 2017-05-16 |
| 9653559 | Methods to enhance doping concentration in near-surface layers of semiconductors and methods of making same | Niloy Mukherjee, Gilbert Dewey, Niti Goel, Sanaz Kabehie, Matthew V. Metz +1 more | 2017-05-16 |
| 9640671 | Deep gate-all-around semiconductor device having germanium or group III-V active layer | Ravi Pillarisetty, Willy Rachmady, Van H. Le, Seung Hoon Sung, Jessica S. Kachian +5 more | 2017-05-02 |
| 9640646 | Semiconductor device having group III-V material active region and graded gate dielectric | Gilbert Dewey, Ravi Pillarisetty, Matthew V. Metz | 2017-05-02 |
| 9640622 | Selective epitaxially grown III-V materials based devices | Niti Goel, Gilbert Dewey, Niloy Mukherjee, Matthew V. Metz, Benjamin Chu-Kung +2 more | 2017-05-02 |
| 9640537 | Non-silicon device heterolayers on patterned silicon substrate for CMOS by combination of selective and conformal epitaxy | Niti Goel, Robert S. Chau, Jack T. Kavalieros, Benjamin Chu-Kung, Matthew V. Metz +7 more | 2017-05-02 |
| 9640422 | III-N devices in Si trenches | Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Seung Hoon Sung, Benjamin Chu-Kung +3 more | 2017-05-02 |
| 9634007 | Trench confined epitaxially grown device layer(s) | Ravi Pillarisetty, Seung Hoon Sung, Niti Goel, Jack T. Kavalieros, Sansaptak Dasgupta +7 more | 2017-04-25 |
| 9590069 | Self-aligned structures and methods for asymmetric GaN transistors and enhancement mode operation | Sansaptak Dasgupta, Han Wui Then, Niloy Mukherjee, Niti Goel, Sanaz K. Gardner +3 more | 2017-03-07 |
| 9583574 | Epitaxial buffer layers for group III-N transistors on silicon substrates | Sansaptak Dasgupta, Han Wui Then, Niloy Mukherjee, Robert S. Chau | 2017-02-28 |
| 9570614 | Ge and III-V channel semiconductor devices having maximized compliance and free surface relaxation | Ravi Pillarisetty, Sansaptak Dasgupta, Niti Goel, Van H. Le, Gilbert Dewey +8 more | 2017-02-14 |
| 9564490 | Apparatus and methods for forming a modulation doped non-planar transistor | Ravi Pillarisetty, Mantu K. Hudait, Willy Rachmady, Gilbert Dewey, Jack T. Kavalieros | 2017-02-07 |