BD

Byung Tai Do

SC Stats Chippac: 21 patents #3 of 121Top 3%
Overall (2016): #1,345 of 481,213Top 1%
21
Patents 2016

Issued Patents 2016

Patent #TitleCo-InventorsDate
9530738 Semiconductor device and method of forming interconnect structure and mounting semiconductor die in recessed encapsulant Linda Pei Ee Chua, Reza A. Pagaila 2016-12-27
9524938 Package-in-package using through-hole via die on saw streets Heap Hoe Kuan, Seng Guan Chow 2016-12-20
9449932 Semiconductor device and method of forming base substrate with recesses for capturing bumped semiconductor die Arnel Senosa Trasporto, Linda Pei Ee Chua, Reza A. Pagaila 2016-09-20
9443828 Semiconductor device and method of embedding thermally conductive layer in interconnect structure for heat dissipation Reza A. Pagaila, Linda Pei Ee Chua 2016-09-13
9431331 Semiconductor device and method of forming penetrable film encapsulant around semiconductor die and interconnect structure Reza A. Pagaila, Linda Pei Ee Chua 2016-08-30
9418941 Semiconductor device and method of forming B-stage conductive polymer over contact pads of semiconductor die in Fo-WLCSP Reza A. Pagaila 2016-08-16
9412624 Integrated circuit packaging system with substrate and method of manufacture thereof Dao Nguyen Phu Cuong, Bartholomew Liao Chung Foh, Kyung-Moon Kim, Jeffrey D. Punzalan, SeungYong Chai +3 more 2016-08-09
9406619 Semiconductor device including pre-fabricated shielding frame disposed over semiconductor die Reza A. Pagaila, Dioscoro A. Merilo 2016-08-02
9406647 Extended redistribution layers bumped wafer Heap Hoe Kuan 2016-08-02
9368423 Semiconductor device and method of using substrate with conductive posts and protective layers to form embedded sensor die package Arnel Senosa Trasporto, Linda Pei Ee Chua, Asri Yusof 2016-06-14
9343429 Semiconductor device and method of forming double-sided through vias in saw streets Reza A. Pagaila 2016-05-17
9331002 Semiconductor device and method of forming through vias with reflowed conductive material Reza A. Pagaila, Linda Pei Ee Chua 2016-05-03
9324641 Integrated circuit packaging system with external interconnect and method of manufacture thereof Arnel Senosa Trasporto, Linda Pei Ee Chua 2016-04-26
9324584 Integrated circuit packaging system with transferable trace lead frame Arnel Senosa Trasporto, Linda Pei Ee Chua 2016-04-26
9312194 Integrated circuit packaging system with terminals and method of manufacture thereof Arnel Senosa Trasporto, Linda Pei Ee Chua 2016-04-12
9305873 Integrated circuit packaging system with electrical interface and method of manufacture thereof Arnel Senosa Trasporto, Linda Pei Ee Chua 2016-04-05
9299644 Integrated circuit packaging system with routed circuit lead array and method of manufacture thereof Arnel Senosa Trasporto, Zigmund Ramirez Camacho 2016-03-29
9293385 RDL patterning with package on package system Reza A. Pagaila, Dioscoro A. Merilo 2016-03-22
9293351 Integrated circuit packaging system with planarity control and method of manufacture thereof Arnel Senosa Trasporto, Linda Pei Ee Chua, Emmanuel Espiritu 2016-03-22
9263361 Semiconductor device having a vertical interconnect structure using stud bumps Reza A. Pagaila, Shuangwu Huang, Rajendra D. Pendse 2016-02-16
9236352 Semiconductor die and method of forming noise absorbing regions between THVs in peripheral region of the die Reza A. Pagaila, Shuangwu Huang, Nathapong Suthiwongsunthorn, Dioscoro A. Merilo 2016-01-12