Issued Patents 2016
Showing 1–25 of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9524924 | Dielectric cover for a through silicon via | Daniel J. Couture, Zhong-Xiang He, Anthony K. Stamper | 2016-12-20 |
| 9514987 | Backside contact to final substrate | Mark D. Jaffe, Steven M. Shank, Anthony K. Stamper | 2016-12-06 |
| 9508578 | Method and apparatus for detecting foreign material on a chuck | Shawn A. Adderly, Samantha D. DiStefano, Max G. Levy, Max L. Lifson, Jed H. Rankin +1 more | 2016-11-29 |
| 9484367 | Germanium photodetector schottky contact for integration with CMOS and Si nanophotonics | Solomon Assefa, Steven M. Shank | 2016-11-01 |
| 9478427 | Semiconductor structures having low resistance paths throughout a wafer | Thomas J. Hartswick, Zhong-Xiang He, Anthony K. Stamper, Eric J. White | 2016-10-25 |
| 9472483 | Integrated circuit cooling apparatus | Richard S. Graf, Sudeep Mandal, Sebastian T. Ventrone | 2016-10-18 |
| 9466547 | Passivation layer topography | Charles L. Arvin, Brian M. Erwin, Christopher D. Muzzy, Wolfgang Sauter | 2016-10-11 |
| 9455187 | Backside device contact | Mark D. Jaffe, Steven M. Shank, Anthony K. Stamper | 2016-09-27 |
| 9437670 | Light activated test connections | Nathaniel R. Chadwick, John Bradley Deforge, John J. Ellis-Monaghan, Ezra D. B. Hall, Marc D. Knox +1 more | 2016-09-06 |
| 9425269 | Replacement emitter for reduced contact resistance | James W. Adkisson, Anthony K. Stamper | 2016-08-23 |
| 9397174 | Self-aligned gate electrode diffusion barriers | John J. Ellis-Monaghan, Russell T. Herrin, Laura J. Schutz, Steven M. Shank | 2016-07-19 |
| 9397054 | Semiconductor structure with an interconnect level having a conductive pad and metallic structure such as a base of a crackstop | Timothy H. Daubenspeck, Christopher D. Muzzy, Wolfgang Sauter | 2016-07-19 |
| 9383404 | High resistivity substrate final resistance test structure | Eric Johnson, Ian McCallum-Cook, Richard A. Phelps, Anthony K. Stamper, Michael J. Zierak | 2016-07-05 |
| 9362229 | Semiconductor devices with enhanced electromigration performance | David L. Harame, Baozhen Li, Timothy D. Sullivan, Bjorn K. A. Zetterlund | 2016-06-07 |
| 9356089 | Low temperature fabrication of lateral thin film varistor | Richard S. Graf, Sudeep Mandal | 2016-05-31 |
| 9337078 | Heat dissipation through device isolation | Qizhi Liu, Zhenzhen Ye, Yan Zhang | 2016-05-10 |
| 9331037 | Preventing misshaped solder balls | Timothy H. Daubenspeck, Christopher D. Muzzy, Wolfgang Sauter, Timothy D. Sullivan | 2016-05-03 |
| 9312426 | Structure with a metal silicide transparent conductive electrode and a method of forming the structure | Derrick Liu, Daniel S. Vanslette | 2016-04-12 |
| 9312205 | Methods of forming a TSV wafer with improved fracture strength | James W. Adkisson, Yoba Amoah, Christine A. Leggett, Max L. Lifson, Charles F. Musante +2 more | 2016-04-12 |
| 9312140 | Semiconductor structures having low resistance paths throughout a wafer | Thomas J. Hartswick, Zhong-Xiang He, Anthony K. Stamper, Eric J. White | 2016-04-12 |
| 9287345 | Semiconductor structure with thin film resistor and terminal bond pad | Fen Chen, Zhong-Xiang He, Tom C. Lee, John C. Malinowski, Anthony K. Stamper | 2016-03-15 |
| 9275744 | Method of restoring a flash memory in an integrated circuit chip package by addition of heat and an electric field | Eduard A. Cartier, Adam J. McPadden, Gary A. Tressler | 2016-03-01 |
| 9275868 | Uniform roughness on backside of a wafer | Shawn A. Adderly, Max L. Lifson, Matthew D. Moon, William J. Murphy, Timothy D. Sullivan +1 more | 2016-03-01 |
| 9269683 | Integrated circuit chip with pyramid or cone-shaped conductive pads for flexible C4 connections and a method of forming the integrated circuit chip | Timothy H. Daubenspeck, Christopher D. Muzzy, Wolfgang Sauter, Timothy D. Sullivan | 2016-02-23 |
| 9269642 | Methods for testing integrated circuits of wafer and testing structures for integrated circuits | Michael T. Coster, Mark A. DiRocco, Kirk D. Peterson | 2016-02-23 |