GS

Gurtej S. Sandhu

Micron: 60 patents #4 of 831Top 1%
Applied Materials: 1 patents #371 of 884Top 45%
📍 Boise, ID: #2 of 574 inventorsTop 1%
🗺 Idaho: #3 of 1,039 inventorsTop 1%
Overall (2003): #8 of 273,478Top 1%
60
Patents 2003

Issued Patents 2003

Showing 1–25 of 60 patents

Patent #TitleCo-InventorsDate
6667502 Structurally-stabilized capacitors and method of making of same Vishnu K. Agarwal 2003-12-23
6660658 Transistor structures, methods of incorporating nitrogen into silicon-oxide-containing layers; and methods of forming transistors John T. Moore, Neal R. Rueger 2003-12-09
6660657 Methods of incorporating nitrogen into silicon-oxide-containing layers John T. Moore, Neal R. Rueger 2003-12-09
6660535 Method of forming haze- free BST films Cem Basceri 2003-12-09
6653154 Method of forming self-aligned, trenchless mangetoresistive random-access memory (MRAM) structure with sidewall containment of MRAM structure Trung T. Doan, Roger Lee, Dennis Keller, Ren Earl 2003-11-25
6649466 Method of forming DRAM circuitry Cem Basceri, Garo Derderian, M. Visokay, J. Drynan 2003-11-18
6642620 Integrated circuits having low resistivity contacts and the formation thereof using an in situ plasma doping and clean Sujit Sharan 2003-11-04
6635939 Boron incorporated diffusion barrier material Vishnu K. Agarwal 2003-10-21
6633084 Semiconductor wafer for improved chemical-mechanical polishing over large area features Chris C. Yu 2003-10-14
6632736 Method of forming low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer Trung T. Doan, Tyler Lowrey 2003-10-14
6630391 Boron incorporated diffusion barrier material Vishnu K. Agarwal 2003-10-07
6627465 System and method for detecting flow in a mass flow controller Sujit Sharan, Neal R. Rueger, Allen Mardian 2003-09-30
6627492 Methods of forming polished material and methods of forming isolation regions Shubneesh Batra 2003-09-30
6627260 Deposition methods Garo Derderian 2003-09-30
6624517 Low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer Trung T. Doan, Tyler Lowrey 2003-09-23
6624085 Semiconductor structure, capacitor, mask and methods of manufacture thereof 2003-09-23
6620253 Engagement mechanism for semiconductor substrate deposition process kit hardware Ross S. Dando, Craig M. Carpenter, Philip Campbell, Allen Mardian 2003-09-16
6617230 Use of selective ozone teos oxide to create variable thickness layers and spacers William Budge, Christopher W. Hill 2003-09-09
6617250 Methods of depositing a layer comprising tungsten and methods of forming a transistor gate line Cem Basceri, Garo Derderian, Mark Visokay, John M. Drynan 2003-09-09
6617206 Method of forming a capacitor structure Guy T. Blalock 2003-09-09
6617246 Semiconductor processing methods and integrated circuitry Ravi Iyer 2003-09-09
6613587 Method of replacing at least a portion of a semiconductor substrate deposition chamber liner Craig M. Carpenter, Ross S. Dando, Philip Campbell, Allen Mardian 2003-09-02
6613702 Methods of forming capacitor constructions Trung T. Doan 2003-09-02
6614072 High coupling split-gate transistor Sukesh Sandhu 2003-09-02
6608343 Rough (high surface area) electrode from Ti and TiN, capacitors and semiconductor devices including same Garo Derderian 2003-08-19