Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9881863 | Semiconductor packages and methods of packaging semiconductor devices | Chuen Khiang Wang, Nathapong Suthiwongsunthorn, Kriangsak Sae Le, Antonio Jr B Dimaano, Catherine Bee Liang Ng +1 more | 2018-01-30 |
| 9589875 | Semiconductor packages and methods of packaging semiconductor devices | Chuen Khiang Wang, Nathapong Suthiwongsunthorn, Kriangsak Sae Le, Antonio Jr B Dimaano, Catherine Bee Liang Ng +1 more | 2017-03-07 |
| 9136142 | Semiconductor packages and methods of packaging semiconductor devices | Chuen Khiang Wang, Nathapong Suthiwongsunthorn, Kriangsak Sae Le, Antonio Jr B Dimaano, Catherine Bee Liang Ng +1 more | 2015-09-15 |
| 8716873 | Semiconductor packages and methods of packaging semiconductor devices | Chuen Khiang Wang, Nathapong Suthiwongsunthorn, Kriangsak Sae Le, Antonio Jr B Dimaano, Catherine Bee Liang Ng +1 more | 2014-05-06 |
| 8592258 | Semiconductor package and method of attaching semiconductor dies to substrates | Denver Paul C. Castillo, Bryan Tan, Rodel Manalac, Pang Hup Ong, Soo Pin Chow +3 more | 2013-11-26 |
| 8247272 | Copper on organic solderability preservative (OSP) interconnect and enhanced wire bonding process | Yong Chuan Koh, Jimmy SIAT, Jeffrey Nantes Salamat, Lope Vallespin Pepito, Jr., Ronaldo Cayetano Calderon +2 more | 2012-08-21 |
| 6514845 | Solder ball contact and method | Kok Chin Fong | 2003-02-04 |
| 6420782 | Vertical ball grid array integrated circuit package | Lee Teck Yeow | 2002-07-16 |
| 6387729 | Method for adhering and sealing a silicon chip in an integrated circuit package | Min Yu Chan, Jing Sua Goh, Siu Waf Low, Boon Pew Chan, Tuck Fook Toh +2 more | 2002-05-14 |
| 6365833 | Integrated circuit package | Min Yu Chan, Jing Sua Goh, Siu Waf Low, Boon Pew Chan, Tuck Fook Toh +2 more | 2002-04-02 |
| 6320126 | Vertical ball grid array integrated circuit package | Lee Teck Yeow | 2001-11-20 |
| 6177723 | Integrated circuit package and flat plate molding process for integrated circuit package | Min Yu Chan, Jing Sua Goh, Boon Pew Chan | 2001-01-23 |
| 6087203 | Method for adhering and sealing a silicon chip in an integrated circuit package | Min Yu Chan, Jing Sua Goh, Siu Waf Low, Boon Pew Chan, Tuck Fook Toh +2 more | 2000-07-11 |
| 6084306 | Bridging method of interconnects for integrated circuit packages | Chee Kiang Yew, Ji Cheng Yang | 2000-07-04 |
| 5998860 | Double sided single inline memory module | Boon Pew Chan | 1999-12-07 |
| 5956233 | High density single inline memory module | Chee Kiang Yew, Sian Yong Khoo, Bok Leng Ser | 1999-09-21 |
| 5952611 | Flexible pin location integrated circuit package | Min Yu Chan, Jing Sua Goh, Siu Waf Low | 1999-09-14 |
| 5798564 | Multiple chip module apparatus having dual sided substrate | Jing Sua Goh | 1998-08-25 |