Issued Patents All Time
Showing 76–100 of 244 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10930333 | Embedded ferroelectric memory cell | Tzu-Yu Chen, Kuo-Chi Tu, Yong-Shiuan Tsair | 2021-02-23 |
| 10903274 | Interconnect landing method for RRAM technology | Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Kuo-Chi Tu +1 more | 2021-01-26 |
| 10868250 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Sheng-Hung Shih +2 more | 2020-12-15 |
| 10862029 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang, Yu-Wen Liao +2 more | 2020-12-08 |
| 10811600 | Switching layer scheme to enhance RRAM performance | Hai-Dang Trinh, Cheng-Yuan Tsai, Hsing-Lien Lin | 2020-10-20 |
| 10796759 | Method and apparatus for reading RRAM cell | Chin-Chieh Yang, Chih-Yang Chang, Chang-Sheng Liao, Hsia-Wei Chen, Jen-Sheng Yang +4 more | 2020-10-06 |
| 10763426 | Method for forming a flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Sheng-Hung Shih +3 more | 2020-09-01 |
| 10763270 | Method for forming an integrated circuit and an integrated circuit | Tzu-Yu Chen, Kuo-Chi Tu, Yong-Shiuan Tsair | 2020-09-01 |
| 10762960 | Resistive random access memory device | Yu-Der Chih, Chung-Cheng Chou | 2020-09-01 |
| 10749108 | Logic compatible RRAM structure and process | Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Kuo-Chi Tu, Yu-Wen Liao | 2020-08-18 |
| 10727337 | Semiconductor device and manufacturing method thereof | Kuo-Chi Tu, Jen-Sheng Yang, Sheng-Hung Shih, Tong-Chern Ong | 2020-07-28 |
| 10727275 | Memory layout for reduced line loading | Chih-Yang Chang | 2020-07-28 |
| 10714536 | Method to form memory cells separated by a void-free dielectric structure | Hsia-Wei Chen, Yu-Wen Liao | 2020-07-14 |
| 10700275 | RRAM cell structure with laterally offset BEVA/TEVA | Chih-Yang Chang, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen, Chin-Chieh Yang +2 more | 2020-06-30 |
| 10686125 | Memory device | Harry-Hak-Lay Chuang, Hung Cho Wang, Tong-Chern Ong, Yu-Wen Liao, Kuei-Hung Shen +2 more | 2020-06-16 |
| 10680038 | RRAM memory cell with multiple filaments | Chin-Chieh Yang, Chih-Yang Chang, Yu-Wen Liao | 2020-06-09 |
| 10622300 | Series MIM structures | Kuo-Chi Tu, Chin-Chieh Yang | 2020-04-14 |
| 10566387 | Interconnect landing method for RRAM technology | Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Kuo-Chi Tu +1 more | 2020-02-18 |
| 10566519 | Method for forming a flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Sheng-Hung Shih +3 more | 2020-02-18 |
| 10529658 | Method for forming a homogeneous bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Yu-Wen Liao | 2020-01-07 |
| 10516106 | Electrode structure to improve RRAM performance | Tong-Chern Ong, Ying-Lang Wang | 2019-12-24 |
| 10510953 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang, Yu-Wen Liao +2 more | 2019-12-17 |
| 10505107 | Switching layer scheme to enhance RRAM performance | Hai-Dang Trinh, Cheng-Yuan Tsai, Hsing-Lien Lin | 2019-12-10 |
| 10504963 | RRAM memory cell with multiple filaments | Chin-Chieh Yang, Chih-Yang Chang, Yu-Wen Liao | 2019-12-10 |
| 10497436 | Memory device and fabrication thereof | Kuo-Chi Tu, Chu-Jie Huang, Sheng-Hung Shih, Nai-Chao Su | 2019-12-03 |