Issued Patents All Time
Showing 1–25 of 83 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12232333 | Integrated circuit | Chieh-Fei Chiu, Wen-Ting Chu, Yong-Shiuan Tsair, Yu-Wen Liao, Chih-Yang Chang | 2025-02-18 |
| 12075634 | RRAM memory cell with multiple filaments | Chih-Yang Chang, Wen-Ting Chu, Yu-Wen Liao | 2024-08-27 |
| 11889705 | Interconnect landing method for RRAM technology | Hsia-Wei Chen, Chih-Yang Chang, Jen-Sheng Yang, Kuo-Chi Tu, Wen-Ting Chu +1 more | 2024-01-30 |
| 11856797 | Resistive switching random access memory with asymmetric source and drain | Hsia-Wei Chen, Chih-Yang Chang, Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao | 2023-12-26 |
| 11844286 | Flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chih-Yang Chang, Jen-Sheng Yang, Sheng-Hung Shih, Tung-Sheng Hsiao +3 more | 2023-12-12 |
| 11751485 | Flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chih-Yang Chang, Jen-Sheng Yang, Sheng-Hung Shih, Tung-Sheng Hsiao +3 more | 2023-09-05 |
| 11751405 | Integrated circuit and method for fabricating the same | Chieh-Fei Chiu, Wen-Ting Chu, Yong-Shiuan Tsair, Yu-Wen Liao, Chih-Yang Chang | 2023-09-05 |
| 11737290 | RRAM memory cell with multiple filaments | Chih-Yang Chang, Wen-Ting Chu, Yu-Wen Liao | 2023-08-22 |
| 11723292 | RRAM cell structure with laterally offset BEVA/TEVA | Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen +2 more | 2023-08-08 |
| 11637239 | High yield RRAM cell with optimized film scheme | Trinh Hai Dang, Hsing-Lien Lin, Cheng-Yuan Tsai, Yu-Wen Liao, Wen-Ting Chu +1 more | 2023-04-25 |
| 11387411 | Logic compatible RRAM structure and process | Chih-Yang Chang, Hsia-Wei Chen, Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao | 2022-07-12 |
| 11239279 | Resistive switching random access memory with asymmetric source and drain | Hsia-Wei Chen, Chih-Yang Chang, Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao | 2022-02-01 |
| 11201281 | Method for forming a flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chih-Yang Chang, Jen-Sheng Yang, Sheng-Hung Shih, Tung-Sheng Hsiao +3 more | 2021-12-14 |
| 11201190 | RRAM memory cell with multiple filaments | Chih-Yang Chang, Wen-Ting Chu, Yu-Wen Liao | 2021-12-14 |
| 11094744 | Interconnect landing method for RRAM technology | Hsia-Wei Chen, Chih-Yang Chang, Jen-Sheng Yang, Kuo-Chi Tu, Wen-Ting Chu +1 more | 2021-08-17 |
| 10903274 | Interconnect landing method for RRAM technology | Hsia-Wei Chen, Chih-Yang Chang, Jen-Sheng Yang, Kuo-Chi Tu, Wen-Ting Chu +1 more | 2021-01-26 |
| 10868250 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Sheng-Hung Shih, Wen-Chun You +2 more | 2020-12-15 |
| 10862029 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Yu-Wen Liao +2 more | 2020-12-08 |
| 10796759 | Method and apparatus for reading RRAM cell | Chih-Yang Chang, Chang-Sheng Liao, Hsia-Wei Chen, Jen-Sheng Yang, Kuo-Chi Tu +4 more | 2020-10-06 |
| 10763426 | Method for forming a flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chih-Yang Chang, Jen-Sheng Yang, Sheng-Hung Shih, Tung-Sheng Hsiao +3 more | 2020-09-01 |
| 10749108 | Logic compatible RRAM structure and process | Chih-Yang Chang, Hsia-Wei Chen, Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao | 2020-08-18 |
| 10700275 | RRAM cell structure with laterally offset BEVA/TEVA | Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen +2 more | 2020-06-30 |
| 10680038 | RRAM memory cell with multiple filaments | Chih-Yang Chang, Wen-Ting Chu, Yu-Wen Liao | 2020-06-09 |
| 10622300 | Series MIM structures | Kuo-Chi Tu, Wen-Ting Chu | 2020-04-14 |
| 10566519 | Method for forming a flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chih-Yang Chang, Jen-Sheng Yang, Sheng-Hung Shih, Tung-Sheng Hsiao +3 more | 2020-02-18 |