Issued Patents All Time
Showing 51–75 of 83 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9780145 | Resistive random access memory (RRAM) structure | Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen | 2017-10-03 |
| 9780302 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Yu-Wen Liao +2 more | 2017-10-03 |
| 9773552 | RRAM cell with PMOS access transistor | Sheng-Hung Shih, Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Jen-Sheng Yang +2 more | 2017-09-26 |
| 9673391 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Yu-Wen Liao, Wen-Ting Chu | 2017-06-06 |
| 9647207 | Resistive random access memory (RRAM) structure | Hai-Dang Trinh, Chia-Shiung Tsai, Chin-Wei Liang, Cheng-Yuan Tsai, Hsing-Lien Lin +1 more | 2017-05-09 |
| 9601545 | Series MIM structures compatible with RRAM process | Kuo-Chi Tu, Wen-Ting Chu | 2017-03-21 |
| 9577009 | RRAM cell with PMOS access transistor | Sheng-Hung Shih, Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Jen-Sheng Yang +2 more | 2017-02-21 |
| 9553265 | RRAM device with data storage layer having increased height | Jen-Sheng Yang, Chih-Yang Chang, Kuo-Chi Tu, Sheng-Hung Shih, Wen-Ting Chu +2 more | 2017-01-24 |
| 9537094 | Logic compatible RRAM structure and process | Chih-Yang Chang, Hsia-Wei Chen, Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao | 2017-01-03 |
| 9478638 | Resistive switching random access memory with asymmetric source and drain | Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Chih-Yang Chang, Hsia-Wei Chen | 2016-10-25 |
| 9466794 | Low form voltage resistive random access memory (RRAM) | Wen-Ting Chu, Yu-Wen Liao, Chih-Yang Chang, Hsia-Wei Chen, Kuo-Chi Tu +1 more | 2016-10-11 |
| 9444045 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Yu-Wen Liao +2 more | 2016-09-13 |
| 9431604 | Resistive random access memory (RRAM) and method of making | Yu-Wen Liao, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen | 2016-08-30 |
| 9425392 | RRAM cell structure with laterally offset BEVA/TEVA | Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen +2 more | 2016-08-23 |
| 9368722 | Resistive random access memory and manufacturing method thereof | Sheng-Hung Shih, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Chih-Yang Chang +3 more | 2016-06-14 |
| 9356072 | Resistive random access memory (RRAM) structure | Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen | 2016-05-31 |
| 9349953 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Yu-Wen Liao, Wen-Chun You +2 more | 2016-05-24 |
| 9331277 | One transistor and one resistive random access memory (RRAM) structure with spacer | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Yu-Wen Liao | 2016-05-03 |
| 9312482 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Yu-Wen Liao, Wen-Ting Chu | 2016-04-12 |
| 9236570 | Resistive memory cell array with top electrode bit line | Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Hsia-Wei Chen, Yu-Wen Liao | 2016-01-12 |
| 9231197 | Logic compatible RRAM structure and process | Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao, Chih-Yang Chang, Hsia-Wei Chen | 2016-01-05 |
| 9231205 | Low form voltage resistive random access memory (RRAM) | Wen-Ting Chu, Yu-Wen Liao, Chih-Yang Chang, Hsia-Wei Chen, Kuo-Chi Tu +1 more | 2016-01-05 |
| 9172036 | Top electrode blocking layer for RRAM device | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Yu-Wen Liao +2 more | 2015-10-27 |
| 9130162 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Yu-Wen Liao, Wen-Ting Chu | 2015-09-08 |
| 9112148 | RRAM cell structure with laterally offset BEVA/TEVA | Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen +2 more | 2015-08-18 |