Issued Patents All Time
Showing 26–50 of 105 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11721758 | Semiconductor structure and associated fabricating method | Jia-Rui Lee, Yi-Chun Lin | 2023-08-08 |
| 11715674 | Trim wall protection method for multi-wafer stacking | Sheng-Chan Li, Cheng-Hsien Chou, Sheng-Chau Chen, Cheng-Yuan Tsai | 2023-08-01 |
| 11610812 | Multi-wafer capping layer for metal arcing protection | Chih-Hui Huang, Cheng-Hsien Chou, Cheng-Yuan Tsai, Sheng-Chan Li | 2023-03-21 |
| 11587908 | 3DIC structure and methods of forming | Yung-Lung Lin, Zhi-Yang Wang, Sheng-Chau Chen, Cheng-Hsien Chou | 2023-02-21 |
| 11552066 | Protective wafer grooving structure for wafer thinning and methods of using the same | Ming-Che Lee, Hau-Yi Hsiao, Cheng-Hsien Chou, Sheng-Chau Chen, Cheng-Yuan Tsai | 2023-01-10 |
| 11545395 | Techniques for wafer stack processing | Yung-Lung Lin, Cheng-Hsien Chou, Cheng-Yuan Tsai, Hau-Yi Hsiao | 2023-01-03 |
| 11545443 | Method for forming hybrid-bonding structure | Kuan-Liang Liu, Pao-Tung Chen | 2023-01-03 |
| 11424359 | Semiconductor device structure with high voltage device | Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin +4 more | 2022-08-23 |
| 11410972 | Hybrid bonding technology for stacking integrated circuits | Ching-Chun Wang, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Min-Feng Kao +3 more | 2022-08-09 |
| 11342322 | Seal ring structures and methods of forming same | Kuan-Liang Liu, Wen-De Wang, Yung-Lung Lin | 2022-05-24 |
| 11322481 | Hybrid bonding technology for stacking integrated circuits | Ching-Chun Wang, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Min-Feng Kao +3 more | 2022-05-03 |
| 11189613 | Semiconductor device | Jia-Rui Lee, Yi-Chun Lin, Alexander Kalnitsky | 2021-11-30 |
| 11189583 | Semiconductor structure and manufacturing method thereof | Sheng-Chau Chen, Shih Pei Chou, Ming-Che Lee, Cheng-Hsien Chou, Cheng-Yuan Tsai +1 more | 2021-11-30 |
| 11152276 | Trim wall protection method for multi-wafer stacking | Sheng-Chan Li, Cheng-Hsien Chou, Sheng-Chau Chen, Cheng-Yuan Tsai | 2021-10-19 |
| 11145713 | High voltage metal-oxide-semiconductor (HVMOS) device integrated with a high voltage junction termination (HVJT) device | Karthick Murukesan, Wen-Chih Chiang, Chun Lin Tsai, Ker Hsiao Huo, Po-Chih Chen +5 more | 2021-10-12 |
| 11145709 | Semiconductor device including a capacitor | Hong-Yang CHEN, Tian Sheng Lin, Yi-Cheng Chiu, Hung-Chou Lin, Yi-Min Chen +1 more | 2021-10-12 |
| 11139210 | Bonding support structure (and related process) for wafer stacking | Sheng-Chan Li, Cheng-Hsien Chou, Cheng-Yuan Tsai, Chih-Hui Huang | 2021-10-05 |
| 11127635 | Techniques for wafer stack processing | Yung-Lung Lin, Cheng-Hsien Chou, Cheng-Yuan Tsai, Hau-Yi Hsiao | 2021-09-21 |
| 11107916 | High voltage transistor structure | Po-Yu Chen, Wan-Hua Huang, Jing Chen | 2021-08-31 |
| 10964781 | High voltage resistor device | Yi-Cheng Chiu, Wen-Chih Chiang, Chun Lin Tsai, Shiuan-Jeng Lin, Yi-Min Chen +2 more | 2021-03-30 |
| 10964789 | Method of fabricating a semiconductor structure having at least one recess | Hong-Shyang Wu | 2021-03-30 |
| 10892360 | Semiconductor device structure with high voltage device | Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin +4 more | 2021-01-12 |
| 10879236 | Bootstrap metal-oxide-semiconductor (MOS) device integrated with a high voltage MOS (HVMOS) device and a high voltage junction termination (HVJT) device | Karthick Murukesan, Wen-Chih Chiang, Chiu-Hua Chung, Chun Lin Tsai, Shiuan-Jeng Lin +4 more | 2020-12-29 |
| 10879288 | Reflector for backside illuminated (BSI) image sensor | Chih-Hui Huang, Cheng-Hsien Chou, Cheng-Yuan Tsai, Sheng-Chan Li | 2020-12-29 |
| 10847650 | Semiconductor structure and associated fabricating method | Jia-Rui Lee, Yi-Chun Lin | 2020-11-24 |