Issued Patents All Time
Showing 1–25 of 65 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12322694 | Metal-insulator-metal device with improved performance | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Kuan-Hua Lin | 2025-06-03 |
| 12315843 | Hybrid bonding technology for stacking integrated circuits | Kuo-Ming Wu, Ching-Chun Wang, Dun-Nian Yaung, Jen-Cheng Liu, Min-Feng Kao +3 more | 2025-05-27 |
| 12300669 | Backside contact for thermal displacement in a multi-wafer stacked integrated circuit | Ping-Tzu Chen, Min-Feng Kao | 2025-05-13 |
| 12283564 | Semiconductor structure and manufacturing method thereof | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Zheng-Xun Li | 2025-04-22 |
| 12278250 | Semiconductor device including image sensor and method of forming the same | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Shyh-Fann Ting | 2025-04-15 |
| 12230554 | Shield structure for backside through substrate vias (TSVs) | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Wei-Tao Tsai | 2025-02-18 |
| 12218106 | Backside contact to improve thermal dissipation away from semiconductor devices | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Yi-Shin Chu, Ping-Tzu Chen +1 more | 2025-02-04 |
| 12218165 | Semiconductor image sensor and method of manufacturing the same | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Che-Wei Chen | 2025-02-04 |
| 12205868 | Oversized via as through-substrate-via (TSV) stop layer | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Yi-Shin Chu, Ping-Tzu Chen | 2025-01-21 |
| 12057446 | Stacked semiconductor device and method | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu | 2024-08-06 |
| 12034037 | Backside capacitor techniques | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu | 2024-07-09 |
| 12033919 | Backside or frontside through substrate via (TSV) landing on metal | Zheng-Xun Li, Min-Feng Kao, Jen-Cheng Liu, Dun-Nian Yaung | 2024-07-09 |
| 11996429 | CMOS image sensor structure with microstructures on backside surface of semiconductor layer | Chien Nan Tu, Yu-Lung Yeh, Chien-Chang Huang, Shih-Shiung Chen | 2024-05-28 |
| 11955428 | Semiconductor structure and manufacturing method thereof | Hsin-Hung Chen, Min-Feng Kao, Jen-Cheng Liu, Dun-Nian Yaung | 2024-04-09 |
| 11942368 | Through silicon vias and methods of fabricating thereof | Min-Feng Kao, Jen-Cheng Liu, Dun-Nian Yaung | 2024-03-26 |
| 11862535 | Through-substrate-via with reentrant profile | Hung-Ling Shih, Wei Chuang Wu, Shih Kuang Yang, Jen-Cheng Liu | 2024-01-02 |
| 11854959 | Metal-insulator-metal device with improved performance | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Kuan-Hua Lin | 2023-12-26 |
| 11791332 | Stacked semiconductor device and method | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu | 2023-10-17 |
| 11764129 | Method of forming shield structure for backside through substrate vias (TSVS) | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Wei-Tao Tsai | 2023-09-19 |
| 11756920 | Semiconductor structure and manufacturing method thereof | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Zheng-Xun Li | 2023-09-12 |
| 11756862 | Oversized via as through-substrate-via (TSV) stop layer | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Yi-Shin Chu, Ping-Tzu Chen | 2023-09-12 |
| 11756936 | Backside contact to improve thermal dissipation away from semiconductor devices | Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Yi-Shin Chu, Ping-Tzu Chen +1 more | 2023-09-12 |
| 11705449 | Through silicon via design for stacking integrated circuits | Kong-Beng Thei, Dun-Nian Yaung, Fu-Jier Fan, Hsiao-Chin Tuan, Jen-Cheng Liu +2 more | 2023-07-18 |
| 11694997 | Backside contact for thermal displacement in a multi-wafer stacked integrated circuit | Ping-Tzu Chen, Min-Feng Kao | 2023-07-04 |
| 11646308 | Through silicon via design for stacking integrated circuits | Kong-Beng Thei, Dun-Nian Yaung, Fu-Jier Fan, Hsiao-Chin Tuan, Jen-Cheng Liu +2 more | 2023-05-09 |