Issued Patents All Time
Showing 1–25 of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12396272 | Stilted pad structure | Sin-Yao Huang, Kuo-Ming Wu, Hung-Wen Hsu | 2025-08-19 |
| 12277977 | ONON sidewall structure for memory device and method for making the same | Chen-Ming Huang, Wen-Tuo Huang, Yu-Hsiang Yang, Yu-Ling Hsu, Wei-Lin Chang +5 more | 2025-04-15 |
| 12266577 | Deep trench isolation structure and method of making the same | Tsung-Yu Yang, Yun-Chi Wu, Po-Wei Liu | 2025-04-01 |
| 12211906 | Method for eliminating divot formation and semiconductor device manufactured using the same | Yu-Wen Tseng, Po-Wei Liu, Tsung-Yu Yang, Tsung-Hua Yang, Yu-Chun Chang | 2025-01-28 |
| 12176266 | Through-substrate via formation to enlarge electrochemical plating window | Ming Chyi Liu, Jiech-Fun Lu | 2024-12-24 |
| 12159803 | Profile of deep trench isolation structure for isolation of high-voltage devices | — | 2024-12-03 |
| 12101931 | Strap-cell architecture for embedded memory | Wen-Tuo Huang, Ping-Cheng Li, Po-Wei Liu, Yu-Ling Hsu, Yong-Shiuan Tsair +2 more | 2024-09-24 |
| 12096629 | Floating gate test structure for embedded memory device | Yong-Shiuan Tsair | 2024-09-17 |
| 12068032 | Device-region layout for embedded flash | Shih Kuang Yang, Ping-Cheng Li, Po-Wei Liu, Wen-Tuo Huang, Yu-Ling Hsu +2 more | 2024-08-20 |
| 12009033 | ONON sidewall structure for memory device and method for making the same | Chen-Ming Huang, Wen-Tuo Huang, Yu-Hsiang Yang, Yu-Ling Hsu, Wei-Lin Chang +5 more | 2024-06-11 |
| 11869951 | Control gate strap layout to improve a word line etch process window | Yu-Ling Hsu, Ping-Cheng Li, Po-Wei Liu, Wen-Tuo Huang, Yong-Shiuan Tsair +2 more | 2024-01-09 |
| 11862535 | Through-substrate-via with reentrant profile | Wei Chuang Wu, Shih Kuang Yang, Hsing-Chih Lin, Jen-Cheng Liu | 2024-01-02 |
| 11854621 | ONON sidewall structure for memory device and methods of making the same | Chen-Ming Huang, Wen-Tuo Huang, ShihKuang Yang, Yu-Chun Chang, Shih-Hsien Chen +5 more | 2023-12-26 |
| 11830765 | Method of forming a deep trench isolation structure for isolation of high-voltage devices | — | 2023-11-28 |
| 11812608 | Semiconductor device and manufacturing method thereof | Tsun-Kai Tsao, Po-Wei Liu, Shun-Shing Yang, Wen-Tuo Huang, Yong-Shiuan Tsair +1 more | 2023-11-07 |
| 11785770 | Strap-cell architecture for embedded memory | Wen-Tuo Huang, Ping-Cheng Li, Po-Wei Liu, Yu-Ling Hsu, Yong-Shiuan Tsair +2 more | 2023-10-10 |
| 11737267 | Floating gate test structure for embedded memory device | Yong-Shiuan Tsair | 2023-08-22 |
| 11699488 | Device-region layout for embedded flash | Shih Kuang Yang, Ping-Cheng Li, Po-Wei Liu, Wen-Tuo Huang, Yu-Ling Hsu +2 more | 2023-07-11 |
| 11670689 | Method for eliminating divot formation and semiconductor device manufactured using the same | Yu-Wen Tseng, Po-Wei Liu, Tsung-Yu Yang, Tsung-Hua Yang, Yu-Chun Chang | 2023-06-06 |
| 11652025 | Through-substrate via formation to enlarge electrochemical plating window | Ming Chyi Liu, Jiech-Fun Lu | 2023-05-16 |
| 11637113 | Semiconductor device and manufacturing method thereof | ShihKuang Yang, Yong-Shiuan Tsair, Po-Wei Liu, Yu-Ling Hsu, Chieh-Fei Chiu +1 more | 2023-04-25 |
| 11552087 | Strap-cell architecture for embedded memory | Wen-Tuo Huang, Ping-Cheng Li, Po-Wei Liu, Yu-Ling Hsu, Yong-Shiuan Tsair +2 more | 2023-01-10 |
| 11450574 | Deep trench isolation structure and method of making the same | Tsung-Yu Yang, Yun-Chi Wu, Po-Wei Liu | 2022-09-20 |
| 11189627 | Method to reduce kink effect in semiconductor devices | Chieh-Fei Chiu, Po-Wei Liu, Wen-Tuo Huang, Yu-Ling Hsu, Yong-Shiuan Tsair +1 more | 2021-11-30 |
| 11158377 | Device-region layout for embedded flash | Shih Kuang Yang, Ping-Cheng Li, Po-Wei Liu, Wen-Tuo Huang, Yu-Ling Hsu +2 more | 2021-10-26 |