Issued Patents All Time
Showing 1–25 of 169 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12406851 | High aspect ratio bosch deep etch | Yu-Hsing Chang, Shih-Chang Liu | 2025-09-02 |
| 12356639 | Double-sided stacked DTC structure | — | 2025-07-08 |
| 12347799 | Bond pad structure coupled to multiple interconnect conductive\ structures through trench in substrate | — | 2025-07-01 |
| 12317568 | Semiconductor structure including source/drain regions at different levels within semiconductor layer and method of manufacture | Yong-Sheng Huang | 2025-05-27 |
| 12255207 | Boundary design for high-voltage integration on HKMG technology | Yi-Huan Chen, Chien-Chih Chou, Alexander Kalnitsky, Kong-Beng Thei, Shih-Chung Hsiao +1 more | 2025-03-18 |
| 12237647 | Techniques for vertical cavity surface emitting laser oxidation | Chen Chen, Jhih-Bin Chen | 2025-02-25 |
| 12219770 | Integrated chip with a gate structure disposed within a trench | Yong-Sheng Huang | 2025-02-04 |
| 12213383 | Fully-wet via patterning method in piezoelectric sensor | Ting-Jung Chen | 2025-01-28 |
| 12211896 | High voltage device with gate extensions | Jhih-Bin Chen | 2025-01-28 |
| 12204232 | Semiconductor device having a gate electrode with a top peripheral portion and a top central portion, and the top peripheral portion is a protrusion or a depression surrounding the top central portion | Hung-Shu Huang, Tung-He Chou | 2025-01-21 |
| 12193227 | Etch method for opening a source line in flash memory | Yong-Sheng Huang, Chih-Pin Huang | 2025-01-07 |
| 12176266 | Through-substrate via formation to enlarge electrochemical plating window | Hung-Ling Shih, Jiech-Fun Lu | 2024-12-24 |
| 12170284 | Semiconductor on insulator having a semiconductor layer with different thicknesses | — | 2024-12-17 |
| 12159886 | Unequal CMOS image sensor pixel size to boost quantum efficiency | Hung-Shu Huang | 2024-12-03 |
| 12159870 | Semiconductor structure and forming method thereof | Hung-Shu Huang, Jhih-Bin Chen, Yu-Chang Jong, Chien-Chih Chou, Jhu-Min Song +3 more | 2024-12-03 |
| 12127421 | Formation of a two-layer via structure to mitigate damage to a display device | Yung-Chang Chang | 2024-10-22 |
| 12094989 | Dielectric sidewall structure for quality improvement in Ge and SiGe devices | Chih-Ming Chen, Lee-Chuan Tseng, Po-Chun Liu | 2024-09-17 |
| 12068313 | Semiconductor arrangement and formation thereof | Harry-Hak-Lay Chuang, Wei-Cheng Wu, Shih-Chang Liu | 2024-08-20 |
| 12062727 | Image sensor with absorption enhancement structure | — | 2024-08-13 |
| 12057418 | Passivation structure with increased thickness for metal pads | Hung-Shu Huang | 2024-08-06 |
| 12046477 | By-site-compensated etch back for local planarization/topography adjustment | Hung-Wen Hsu, Min-Yung Ko | 2024-07-23 |
| 12022651 | Flash memory structure with enhanced floating gate | Hung-Shu Huang | 2024-06-25 |
| 12014966 | Semiconductor memory device having composite dielectric film structure and methods of forming the same | Sheng-Chieh Chen, Wei-Ming Wang, Ming-Lun Lee, Chih-Ren Hsieh | 2024-06-18 |
| 11990433 | Bond pad structure coupled to multiple interconnect conductive\ structures through trench in substrate | — | 2024-05-21 |
| 11980046 | Method for forming an isolation structure having multiple thicknesses to mitigate damage to a display device | Yung-Chang Chang | 2024-05-07 |