Issued Patents All Time
Showing 26–50 of 169 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11948969 | Semiconductor structure and method of manufacturing the same | Chun-Tsung Kuo | 2024-04-02 |
| 11908891 | High voltage device with gate extensions | Jhih-Bin Chen | 2024-02-20 |
| 11869988 | Double-sided stacked DTC structure | — | 2024-01-09 |
| 11855091 | Boundary design for high-voltage integration on HKMG technology | Yi-Huan Chen, Chien-Chih Chou, Alexander Kalnitsky, Kong-Beng Thei, Shih-Chung Hsiao +1 more | 2023-12-26 |
| 11846871 | Device with a recessed gate electrode that has high thickness uniformity | Hung-Shu Huang, Tung-He Chou | 2023-12-19 |
| 11784460 | Bump bonding structure to mitigate space contamination for III-V dies and CMOS dies | Jhih-Bin Chen | 2023-10-10 |
| 11778816 | Etch method for opening a source line in flash memory | Yong-Sheng Huang, Chih-Pin Huang | 2023-10-03 |
| 11756970 | Metal grid structure to improve image sensor performance | Jiech-Fun Lu | 2023-09-12 |
| 11749763 | Dielectric sidewall structure for quality improvement in Ge and SiGe devices | Chih-Ming Chen, Lee-Chuan Tseng, Po-Chun Liu | 2023-09-05 |
| 11742434 | Memory device having recessed active region | Yong-Sheng Huang | 2023-08-29 |
| 11742262 | Integrated circuit having a resistor layer partially overlapping endcaps | Yuan-Tai Tseng, Chia-Shiung Tsai, Chung-Yen Chou | 2023-08-29 |
| 11735636 | Integrated chip with a gate structure over a recess | Yong-Sheng Huang | 2023-08-22 |
| 11735624 | Multi-lateral recessed MIM structure | Alexander Kalnitsky, Ru-Liang Lee, Sheng-Chan Li, Sheng-Chau Chen | 2023-08-22 |
| 11723207 | Integrated chip with a gate structure disposed within a trench | Yong-Sheng Huang | 2023-08-08 |
| 11714299 | Heater structure configured to improve thermal efficiency in a modulator device | Shih-Wei Lin | 2023-08-01 |
| 11670725 | Image sensor with absorption enhancement structure | — | 2023-06-06 |
| 11652025 | Through-substrate via formation to enlarge electrochemical plating window | Hung-Ling Shih, Jiech-Fun Lu | 2023-05-16 |
| 11637046 | Semiconductor memory device having composite dielectric film structure and methods of forming the same | Sheng-Chieh Chen, Chih-Ren Hsieh, Ming-Lun Lee, Wei-Ming Wang | 2023-04-25 |
| 11616209 | Formation of a two-layer via structure to mitigate damage to a display device | Yung-Chang Chang | 2023-03-28 |
| 11587939 | Etch method for opening a source line in flash memory | Yong-Sheng Huang, Chih-Pin Huang | 2023-02-21 |
| 11574882 | Pad structure and manufacturing method thereof in semiconductor device | Hung-Shu Huang | 2023-02-07 |
| 11557710 | Fully-wet via patterning method in piezoelectric sensor | Ting-Jung Chen | 2023-01-17 |
| 11545584 | Memory device having recessed active region | Yong-Sheng Huang | 2023-01-03 |
| 11532579 | Passivation structure with increased thickness for metal pads | Hung-Shu Huang | 2022-12-20 |
| 11462563 | Memory device and manufacturing method thereof | Yong-Sheng Huang | 2022-10-04 |