Issued Patents All Time
Showing 51–69 of 69 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9559044 | Package with solder regions aligned to recesses | Hsien-Wei Chen, Hsien-Ming Tu, Chang-Pin Huang, Yu-Chia Lai, Tung-Liang Shao | 2017-01-31 |
| 9484318 | Semiconductor device and manufacturing method thereof | Tung-Liang Shao, Yu-Chia Lai, Hsien-Ming Tu, Chang-Pin Huang | 2016-11-01 |
| 9461106 | MIM capacitor and method forming the same | Chang-Pin Huang, Hsien-Ming Tu, Hao-Yi Tsai, Mirng-Ji Lii, Shih-Wei Liang +1 more | 2016-10-04 |
| 9449927 | Seal ring structure with metal-insulator-metal capacitor | Hsien-Wei Chen, Tung-Liang Shao, Yu-Chia Lai, Hao-Yi Tsai, Tsung-Yuan Yu | 2016-09-20 |
| 9355979 | Alignment structures and methods of forming same | Hsien-Wei Chen | 2016-05-31 |
| 9343417 | Hollow metal pillar packaging scheme | Chang-Pin Huang, Hsien-Ming Tu, Hsien-Wei Chen, Tung-Liang Shao, Yu-Chia Lai | 2016-05-17 |
| 9318456 | Self-alignment structure for wafer level chip scale package | Yu-Chia Lai, Hsien-Ming Tu, Tung-Liang Shao, Hsien-Wei Chen, Chang-Pin Huang | 2016-04-19 |
| 9153504 | Metal insulator metal capacitor and method for making the same | Yu-Chia Lai, Tung-Liang Shao | 2015-10-06 |
| 9117831 | Seal ring structure for integrated circuit chips | Yu-Wen Liu, Michael Shou-Ming Tong, Hsien-Wei Chen, Chung-Ying Yang, Tsung-Yuan Yu | 2015-08-25 |
| 9048149 | Self-alignment structure for wafer level chip scale package | Yu-Chia Lai, Hsien-Ming Tu, Tung-Liang Shao, Hsien-Wei Chen, Chang-Pin Huang | 2015-06-02 |
| 8963328 | Reducing delamination between an underfill and a buffer layer in a bond structure | Chang-Pin Huang, Tzuan-Horng Liu, Michael Shou-Ming Tong, Ying-Ju Chen, Tung-Liang Shao +3 more | 2015-02-24 |
| 8810025 | Reinforcement structure for flip-chip packaging | Yu-Wen Liu, Hsien-Wei Chen, Hsin-Yu Pan, Chao-Wen Shih | 2014-08-19 |
| 8618827 | Measurement of electrical and mechanical characteristics of low-K dielectric in a semiconductor device | Tung-Liang Shao, Shih-Wei Liang, Ying-Ju Chen, Hsien-Wei Chen, Hao-Yi Tsai +2 more | 2013-12-31 |
| 8610267 | Reducing delamination between an underfill and a buffer layer in a bond structure | Chang-Pin Huang, Tzuan-Horng Liu, Michael Shou-Ming Tong, Ying-Ju Chen, Tung-Liang Shao +3 more | 2013-12-17 |
| 8445911 | Active device array substrate | Ke-Chih Chang, Kuo-Yu Huang, Yu-Cheng Chen | 2013-05-21 |
| 8421496 | Digital logic circuit and manufacture method thereof | Tsung-Ju Yu | 2013-04-16 |
| 8237160 | Probe pad on a corner stress relief region in a semiconductor chip | Hsien-Wei Chen, Chung-Ying Yang, Ying-Ju Chen, Shih-Wei Liang | 2012-08-07 |
| 7974054 | Integrated circuit with electrostatic discharge protection circuit | Kun-Tai Wu | 2011-07-05 |
| D348737 | Supporting buffer block for highway security railing | — | 1994-07-12 |