Issued Patents All Time
Showing 26–50 of 140 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11710777 | Semiconductor device and method for manufacture | Chia-Ao Chang, De-Wei Yu, Yee-Chia Yeo, Hsueh-Chang Sung, Pei-Ren Jeng | 2023-07-25 |
| 11652105 | Epitaxy regions with large landing areas for contact plugs | Jung-Chi Tai, Yi-Fang Pai, Tsz-Mei Kwok, Tsung-Hsi Yang, Jeng-Wei Yu +5 more | 2023-05-16 |
| 11600715 | FETs and methods of forming FETs | Tzu-Ching Lin, Chien-I Kuo, Wei Te Chiang, Wei Hao Lu, Li-Li Su | 2023-03-07 |
| 11581425 | Method for manufacturing semiconductor structure with enlarged volumes of source-drain regions | Tsung-Hsi Yang, Che-Yu Lin, Yi-Fang Pai, Pei-Ren Jeng, Yee-Chia Yeo | 2023-02-14 |
| 11575026 | Source/drain structure for semiconductor device | Chien-Wei Lee, Heng-Wen Ting, Yee-Chia Yeo, Yen-Ru Lee, Chih-Yun Chin +2 more | 2023-02-07 |
| 11569084 | Method for manufacturing semiconductor structure with reduced nodule defects | Che-Yu Lin, Chih-Chiang Chang, Chien-Hung Chen, Ming-Hua Yu, Tsung-Hsi Yang +2 more | 2023-01-31 |
| 11482620 | Interfacial layer between Fin and source/drain region | Chih-Yun Chin, Chien-Wei Lee, Hsueh-Chang Sung, Heng-Wen Ting, Roger Tai +5 more | 2022-10-25 |
| 11476331 | Supportive layer in source/drains of FinFET devices | Jung-Chi Tai, Pei-Ren Jeng, Yen-Ru Lee, Yan-Ting Lin, Chih-Yun Chin | 2022-10-18 |
| 11437515 | Source and drain stressors with recessed top surfaces | Kun-Mu Li, Tsz-Mei Kwok, Hsueh-Chang Sung, Tze-Liang Lee | 2022-09-06 |
| 11437497 | Semiconductor device and method | Ji-Yin Tsai, Jung-Jen Chen, Pei-Ren Jeng, Kei-Wei Chen, Yee-Chia Yeo | 2022-09-06 |
| 11430878 | Method for fabricating semiconductor device | Yen-Ru Lee, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Lilly Su +1 more | 2022-08-30 |
| 11411109 | MOS devices having epitaxy regions with reduced facets | Hsueh-Chang Sung, Kun-Mu Li, Tze-Liang Lee, Tsz-Mei Kwok | 2022-08-09 |
| 11367660 | Semiconductor method and device | Cheng-Hsiung Yen, Ta-Chun Ma, Chien-Chang Su, Jung-Jen Chen, Pei-Ren Jeng +1 more | 2022-06-21 |
| 11264237 | Method of epitaxy and semiconductor device | Chih-Yun Chin, Tzu-Hsiang Hsu, Yen-Ru Lee | 2022-03-01 |
| 11257951 | Method of making semiconductor device having first and second epitaxial materials | Lilly Su, Ming-Hua Yu, Pang-Yen Tsai, Tze-Liang Lee, Yen-Ru Lee | 2022-02-22 |
| 11211470 | Semiconductor device and method | Meng-Ku Chen, Cheng-Po Chau, Pei-Ren Jeng, Yee-Chia Yeo, Chia-Ao Chang | 2021-12-28 |
| 11205713 | FinFET having a non-faceted top surface portion for a source/drain region | Tzu-Ching Lin, Chien-I Kuo, Wei Te Chiang, Wei Hao Lu, Li-Li Su | 2021-12-21 |
| 11171209 | Semiconductor device and method of manufacture | Heng-Wen Ting, Kei-Wei Chen, Pei-Ren Jeng, Hsueh-Chang Sung, Yen-Ru Lee +1 more | 2021-11-09 |
| 11127637 | Semiconductor device convex source/drain region | Tzu-Ching Lin, Chien-I Kuo, Li-Li Su | 2021-09-21 |
| 11121255 | V-shape recess profile for embedded source/drain epitaxy | Chih-Shan Chen, Roger Tai, Yih-Ann Lin, Yen-Ru Lee, Tzu-Ching Lin | 2021-09-14 |
| 11107921 | Source/drain recess in a semiconductor device | Eric Peng, Chao-Cheng Chen, Ming-Hua Yu, Shih-Hao Lo, Syun-Ming Jang +2 more | 2021-08-31 |
| 11087987 | Semiconductor device and method | Ta-Chun Ma, Yi-Cheng Li, Pin-Ju Liang, Cheng-Po Chau, Jung-Jen Chen +3 more | 2021-08-10 |
| 11011634 | Elongated source/drain region structure in finFET device | Wei-Yang Lee, Ting-Yeh Chen, Feng-Cheng Yang | 2021-05-18 |
| 11004745 | Semiconductor device convex source/drain region | Tzu-Ching Lin, Chien-I Kuo, Li-Li Su | 2021-05-11 |
| 11004724 | FETS and methods of forming FETS | Yen-Ru Lee, Chien-I Kuo, Li-Li Su, Chien-Chang Su, Heng-Wen Ting +3 more | 2021-05-11 |