Issued Patents All Time
Showing 51–75 of 111 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10727097 | Mechanisms for cleaning substrate surface for hybrid bonding | Sheng-Chau Chen, Chih-Hui Huang, Yeur-Luen Tu, Chia-Shiung Tsai, Xiao-Meng Chen | 2020-07-28 |
| 10672909 | Strained gate semiconductor device having an interlayer dielectric doped with oxygen and a large species material | Chii-Ming Wu, Shiu-Ko JangJian, Kun-Tzu Lin, Lan Chang | 2020-06-02 |
| 10658474 | Method for forming thin semiconductor-on-insulator (SOI) substrates | Chia-Shiung Tsai, Jiech-Fun Lu, Kuo-Hwa Tzeng, Shih Pei Chou, Yu-Hung Cheng +1 more | 2020-05-19 |
| 10553474 | Method for forming a semiconductor-on-insulator (SOI) substrate | Chia-Shiung Tsai, Jiech-Fun Lu, Kuan-Liang Liu, Shih Pei Chou, Yu-Hung Cheng +1 more | 2020-02-04 |
| 10529863 | Flat STI surface for gate oxide uniformity in Fin FET devices | Cheng-Wei Chen, Shiu-Ko JangJian, Ting-Chun Wang | 2020-01-07 |
| 10504998 | Semiconductor structure and method of forming the same | Yi-Hsien Lee, Wei-Ming You, Ting-Chun Wang | 2019-12-10 |
| 10468486 | SOI substrate, semiconductor device and method for manufacturing the same | Kuo-Hwa Tzeng, Chih-Hao Wang, Yeur-Luen Tu, Chung-Yi Yu | 2019-11-05 |
| 10304723 | Process to form SOI substrate | Yu-Hung Cheng, Ming-Che Yang, Wei-Kung Tsai, Yong-En Syu, Yeur-Luen Tu +1 more | 2019-05-28 |
| 10290502 | Apparatus for reducing stripe patterns | Chung Chien Wang, Yeur-Luen Tu, Chia-Shiung Tsai | 2019-05-14 |
| 10205387 | Charge pump circuit | Wen-Chi Lin, Keng-Nan Chen | 2019-02-12 |
| 10192985 | FinFET with doped isolation insulating layer | Ting-Chun Wang, Wei-Ming You, J. W. Wu | 2019-01-29 |
| 10192988 | Flat STI surface for gate oxide uniformity in Fin FET devices | Shiu-Ko JangJian, Cheng-Wei Chen, Ting-Chun Wang | 2019-01-29 |
| 10186542 | Patterning for substrate fabrication | Wei-Chao Chiu, Kai-Meng Tzeng, Chih-Chien Wang, Chun-Wei Chang, Ching-Sen Kuo +1 more | 2019-01-22 |
| 10163647 | Method for forming deep trench structure | Min-Ying Tsai, Yeur-Luen Tu | 2018-12-25 |
| 10157780 | Method of forming a device having a doping layer and device formed | Chii-Ming Wu | 2018-12-18 |
| 10157770 | Semiconductor device having isolation structures with different thickness and method of forming the same | Chii-Ming Wu, Sen-Hong Syue, Cheng-Po Chau | 2018-12-18 |
| 10109756 | Backside illuminated photo-sensitive device with gradated buffer layer | Yu-Hung Cheng, Chia-Shiung Tsai, Xiaomeng Chen, Yen-Chang Chu, Yeur-Luen Tu | 2018-10-23 |
| 10103267 | Method of forming FinFET gate oxide | Ting-Chun Wang, Yuan Chen | 2018-10-16 |
| 10079257 | Anti-reflective layer for backside illuminated CMOS image sensors | Hsing-Lien Lin, Yeur-Luen Tu, Cheng-Yuan Tsai, Chia-Shiung Tsai | 2018-09-18 |
| 10062787 | FinFET | Yu-Ting Hsiao, Lun-Kuang Tan, Liang-Yu Yen, Ting-Chun Wang, Tsung-Han Wu +1 more | 2018-08-28 |
| 10026838 | Fin-type field effect transistor and manufacturing method thereof | Yung-Yu Wang, Yung-Hsiang Chan, Chia-Ying Tsai, Ting-Chun Wang | 2018-07-17 |
| 10020401 | Methods for straining a transistor gate through interlayer dielectric (ILD) doping schemes | Chii-Ming Wu, Shiu-Ko JangJian, Kun-Tzu Lin, Lan Chang | 2018-07-10 |
| 9893185 | Fin field effect transistor and method for fabricating the same | Yu-Ting Lin, Po-Kai Hsiao, Po-Kang Ho, Ting-Chun Wang | 2018-02-13 |
| 9859326 | Semiconductor devices, image sensors, and methods of manufacture thereof | Sheng-Chau Chen, Tung-Ting Wu, Chih-Hui Huang, Yeur-Luen Tu, Jhy-Jyi Sze | 2018-01-02 |
| 9768261 | Semiconductor structure and method of forming the same | Yi-Hsien Lee, Wei-Ming You, Ting-Chun Wang | 2017-09-19 |