CY

Chen-Nan Yeh

TSMC: 44 patents #763 of 12,232Top 7%
📍 Dayuan District, TW: #1 of 135 inventorsTop 1%
Overall (All Time): #65,453 of 4,157,543Top 2%
45
Patents All Time

Issued Patents All Time

Showing 26–45 of 45 patents

Patent #TitleCo-InventorsDate
7977772 Hybrid metal fully silicided (FUSI) gate Chen-Hua Yu, Cheng-Tung Lin, Cheng-Hung Chang, Hsiang-Yi Wang 2011-07-12
7939889 Reducing resistance in source and drain regions of FinFETs Chen-Hua Yu, Yu-Rung Hsu, Cheng-Hung Chang 2011-05-10
7910994 System and method for source/drain contact processing Chen-Hua Yu, Cheng-Hung Chang, Yu-Rung Hsu 2011-03-22
7902035 Semiconductor device having multiple fin heights Chen-Hua Yu, Yu-Rung Hsu 2011-03-08
7892909 Polysilicon gate formation by in-situ doping Chen-Hua Yu, Ding-Yuan Chen, Chu-Yun Fu, Liang-Gi Yao 2011-02-22
7880303 Stacked contact with low aspect ratio Chen-Hua Yu, Chih-Hsiang Yao, Wen-Kai Wan, Jye-Yen Cheng 2011-02-01
7843000 Semiconductor device having multiple fin heights Chen-Hua Yu, Yu-Rung Hsu 2010-11-30
7745890 Hybrid metal fully silicided (FUSI) gate Chen-Hua Yu, Cheng-Tung Lin, Cheng-Hung Chang, Hsiang-Yi Wang 2010-06-29
7667271 Fin field-effect transistors Chen-Hua Yu, Yu-Rung Hsu 2010-02-23
7629655 Semiconductor device with multiple silicide regions Chen-Hua Yu, Cheng-Tung Lin 2009-12-08
7612405 Fabrication of FinFETs with multiple fin heights Chen-Hua Yu, Chu-Yun Fu, Yu-Rung Hsu 2009-11-03
7560785 Semiconductor device having multiple fin heights Chen-Hua Yu, Yu-Rung Hsu 2009-07-14
7538025 Dual damascene process flow for porous low-k materials Chao-Cheng Chen, Chien-Chung Fu 2009-05-26
7510940 Method for fabricating dual-gate semiconductor device Mong-Song Liang, Ryan Chia-Jen Chen, Yuan-Hung Chiu 2009-03-31
7341943 Post etch copper cleaning using dry plasma Miao-Ju Hsu, Hun-Jan Tao 2008-03-11
7169701 Dual damascene trench formation to avoid low-K dielectric damage Tsiao-Chen Wu, Chao-Cheng Chen 2007-01-30
7094683 Dual damascene method for ultra low K dielectrics Yung-Cheng Lu 2006-08-22
7029992 Low oxygen content photoresist stripping process for low dielectric constant materials Jyu-Horng Shieh, Yi-Nien Su, Jang-Shiang Tsai, Hun-Jan Tao 2006-04-18
6797630 Partial via hard mask open on low-k dual damascene etch with dual hard mask (DHM) approach Tsang-Jiuh Wu, Li-Te Lin, Li-Chih Chao 2004-09-28
6616855 Process to reduce surface roughness of low K damascene Chao-Cheng Chen 2003-09-09