Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11907631 | Reset domain crossing detection and simulation | Paras Mal Jain, Rajarshi Mukherjee, Deep Shah, Satrajit Pal, Dipit Ranjan Senapati +1 more | 2024-02-20 |
| 11526641 | Formal gated clock conversion for field programmable gate array (FPGA) synthesis | Lisa McIlwain, Guillaume Plassan, Dipti Ranjan Senapati | 2022-12-13 |
| 10878153 | Apparatuses and methods for accurate and efficient clock domain and reset domain verification with register transfer level memory inference | Dipti Ranjan Senapati, Kaushik De | 2020-12-29 |
| 10589165 | Snow sport equipment waxing device and method | Jonathan Neil Hart, Naeem Rahim, Jonathan E. Hunt, Chris Witham, Devin Owen Howells +3 more | 2020-03-17 |
| 10387605 | System and method for managing and composing verification engines | Maher Mneimneh, Scott Cotton, Mohamed Shaker Sarwary, Sudeep Mondal, Paras Mal Jain | 2019-08-20 |
| 9724592 | Snow sport equipment waxing device and method | Jonathan Neil Hart, Naeem Rahim, Devin Owen Howells, Chris Witham | 2017-08-08 |
| 9721058 | System and method for reactive initialization based formal verification of electronic logic design | Mohamed Shaker Sarwary, Hans-Jorg Peter, Barsneya Chakrabarti, Mohammad H. Movahed-Ezazi | 2017-08-01 |
| 9405872 | System and method for reducing power of a circuit using critical signal analysis | Solaiman Rahim, Sean Safarpour, Shekaripuram V. Venkatesh, Siddharth Guha | 2016-08-02 |