Barsneya Chakrabarti — 5 Patents at Synopsys

Barsneya Chakrabarti has been granted 5 US patents while listed as an inventor at Synopsys. The first was granted in 2014 and the most recent in November 2025. Barsneya Chakrabarti ranks #907,971 of 4,157,543 US inventors in our database (top 21.8%). Patent records list Barsneya Chakrabarti in Noida, IN.

Issued Patents All Time

Showing 1–5 of 5 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12475231	Hardware security checks in static verification of integrated circuit designs	Susnata Mondal, Anuj Yogendra Arora, Paras Mal Jain	2025-11-18
10599800	Formal clock network analysis, visualization, verification and generation	Mohamed Shaker Sarwary, Hans-Joerg Peter, Guillaume Plassan, Mohammad H. Movahed-Ezazi	2020-03-24	$19,517,000
9721058	System and method for reactive initialization based formal verification of electronic logic design	Mohamed Shaker Sarwary, Hans-Jorg Peter, Fahim Rahim, Mohammad H. Movahed-Ezazi	2017-08-01	$9,588,000
9201992	Method and apparatus using formal methods for checking generated-clock timing definitions	Sridhar Gangadharan, Manish Goel, Mohammad H. Movahed-Ezazi	2015-12-01	$7,817,000
8656328	System and method for abstraction of a circuit portion of an integrated circuit	Mohamed Shaker Sarwary, Mohammed Movahed-Ezazi, Manish Gupta, Chandan Kumar	2014-02-18

Barsneya Chakrabarti — 5 Patents

Issued Patents All Time

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