Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11403450 | Convergence centric coverage for clock domain crossing (CDC) jitter in simulation | Anshu Malani, Paras Mal Jain, Rajarshi Mukherjee | 2022-08-02 |
| 11238202 | Verifying glitches in reset path using formal verification and simulation | Paras Mal Jain, Anshul Tuteja | 2022-02-01 |
| 11087059 | Clock domain crossing verification of integrated circuit design using parameter inference | Anshu Malani, Paras Mal Jain | 2021-08-10 |
| 10387605 | System and method for managing and composing verification engines | Maher Mneimneh, Scott Cotton, Mohamed Shaker Sarwary, Fahim Rahim, Paras Mal Jain | 2019-08-20 |