SV

Shekaripuram V. Venkatesh

SY Synopsys: 6 patents #194 of 2,302Top 9%
CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
📍 Los Altos, CA: #1,171 of 3,651 inventorsTop 35%
🗺 California: #73,997 of 386,348 inventorsTop 20%
Overall (All Time): #601,757 of 4,157,543Top 15%
8
Patents All Time

Issued Patents All Time

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDate
12298841 Failure prediction of field-deployed mission critical integrated circuit chips using artificial intelligence Tonatiuh Rangel Gordillo 2025-05-13
12124780 Power estimation using input vectors and deep recurrent neural networks Chaofan Wang, Vaibhav Jain, Solaiman Rahim 2024-10-22
11651129 Selecting a subset of training data from a data pool for a power prediction model Chaofan Wang, Vaibhav Jain, Solaiman Rahim 2023-05-16
10733342 System and method for hierarchical power verification Nitin Sharma, Sanjay Gulati, Parul Bhatia 2020-08-04
10311192 System and method for power verification using efficient merging of power state tables Sanjay Gulati, Vishal Keswani, Manish Goel, Nitin Sharma 2019-06-04
9405872 System and method for reducing power of a circuit using critical signal analysis Solaiman Rahim, Sean Safarpour, Siddharth Guha, Fahim Rahim 2016-08-02
6877143 System and method for timing abstraction of digital logic circuits Robert J. Palermo, Karem A. Sakallah, Mohammad Mortazavi 2005-04-05
6442739 System and method for timing abstraction of digital logic circuits Robert J. Palermo, Karem A. Sakallah, Mohammad Mortazavi 2002-08-27