Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7647220 | Transistor-level timing analysis using embedded simulation | Pawan Kulshreshtha, Robert J. Palermo, Cyrus Bamji, Hakan Yalcin | 2010-01-12 |
| 7346872 | Functional timing analysis for characterization of virtual component blocks | Hakan Yalcin, Robert J. Palmero, Karem A. Sakallah, Cyrus Bamji | 2008-03-18 |
| 6877143 | System and method for timing abstraction of digital logic circuits | Robert J. Palermo, Karem A. Sakallah, Shekaripuram V. Venkatesh | 2005-04-05 |
| 6760894 | Method and mechanism for performing improved timing analysis on virtual component blocks | Hakan Yalcin, Cyrus Bamji, Robert J. Palermo | 2004-07-06 |
| 6457159 | Functional timing analysis for characterization of virtual component blocks | Hakan Yalcin, Robert J. Palmero, Karem A. Sakallah, Cyrus Bamji | 2002-09-24 |
| 6442739 | System and method for timing abstraction of digital logic circuits | Robert J. Palermo, Karem A. Sakallah, Shekaripuram V. Venkatesh | 2002-08-27 |