DS

Dipti Ranjan Senapati

SY Synopsys: 3 patents #460 of 2,302Top 20%
Overall (All Time): #1,424,823 of 4,157,543Top 35%
3
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11526641 Formal gated clock conversion for field programmable gate array (FPGA) synthesis Lisa McIlwain, Fahim Rahim, Guillaume Plassan 2022-12-13
10878153 Apparatuses and methods for accurate and efficient clock domain and reset domain verification with register transfer level memory inference Kaushik De, Fahim Rahim 2020-12-29
9792394 Accurate glitch detection Kaushik De, Mahantesh D. Narwade, Namit Gupta, Rajarshi Mukherjee 2017-10-17