Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11212282 | Connected [i.e. linked] accounts of a user keeps signed state in alive of other connected [i.e. linked] accounts | Akshay Navneetlal Mutha, Rohit Dilip Mahale, Alexandra Veronica Rinja | 2021-12-28 |
| 10715523 | Default to signed-in state | Akshay Navneetlal Mutha | 2020-07-14 |
| 10289773 | Reset domain crossing management using unified power format | Deep Shah, Mohamed Shaker Sarwary | 2019-05-14 |
| 9990453 | Clock-domain-crossing specific design mutations to model silicon behavior and measure verification robustness | Jean-Marc A. Forey, Mahantesh D. Narwade, Horia Alexandru Toma | 2018-06-05 |
| 9886753 | Verification of circuit structures including sub-structure variants | Mahantesh D. Narwade, Kaushik De, Rajarshi Mukherjee, Suman Nandan, Subhamoy Pal | 2018-02-06 |
| 9792394 | Accurate glitch detection | Kaushik De, Dipti Ranjan Senapati, Mahantesh D. Narwade, Rajarshi Mukherjee | 2017-10-17 |
| 9529948 | Minimizing crossover paths for functional verification of a circuit description | Kaushik De, Mahantesh D. Narwade, Rajarshi Mukherjee | 2016-12-27 |
| 8856706 | System and method for metastability verification of circuits of an integrated circuit | Maher Mneimneh, Shaker Sarwary, Paras Mal Jain, Ashish Bansal, Mohammad H. Movahed-Ezazi | 2014-10-07 |
| 8448111 | System and method for metastability verification of circuits of an integrated circuit | Maher Mneimneh, Shaker Sarwary, Paras Mal Jain, Ashish Bansal, Mohammad H. Movahed-Ezazi | 2013-05-21 |