AJ

Antonio B. Dimaano, Jr.

SC Stats Chippac: 26 patents #32 of 425Top 8%
UP Utac Headquarters Pte.: 5 patents #7 of 101Top 7%
AP Advanpack Solutions Pte: 3 patents #9 of 37Top 25%
SS St Assembly Test Services: 1 patents #36 of 63Top 60%
UC United Test And Assembly Center: 1 patents #30 of 65Top 50%
📍 Singapore, SG: #127 of 13,971 inventorsTop 1%
Overall (All Time): #94,140 of 4,157,543Top 3%
36
Patents All Time

Issued Patents All Time

Showing 26–36 of 36 patents

Patent #TitleCo-InventorsDate
7556987 Method of fabricating an integrated circuit with etched ring and die paddle Il Kwon Shim, Sheila Rima C. Magno 2009-07-07
7545032 Integrated circuit package system with stiffener Henry Descalzo Bathan, Jeffrey D. Punzalan, Zigmund Ramirez Camacho 2009-06-09
7541222 Wire sweep resistant semiconductor package and manufacturing method therefor Sheila Rima C. Magno, Byung Tai Do, Dennis Guillermo 2009-06-02
7482683 Integrated circuit encapsulation system with vent Erick Dahilig, Sheila Marie L. Alvarez, Robinson Quiazon, Jose Alvin Caparas 2009-01-27
7479692 Integrated circuit package system with heat sink Il Kwon Shim, Henry Descalzo Bathan, Jeffrey D. Punzalan 2009-01-20
7456496 Package design and method of manufacture for chip grid array Tan Kim Hwee, Roman Perez, Kee Kwang Lau, Alex Chew 2008-11-25
7385299 Stackable integrated circuit package system with multiple interconnect interface Seng Guan Chow, Heap Hoe Kuan, Dioscoro A. Merilo 2008-06-10
7141886 Air pocket resistant semiconductor package Byung Tai Do, Dennis Guillermo, Sheila Rima C. Magno 2006-11-28
6929981 Package design and method of manufacture for chip grid array Tan Kim Hwee, Roman Perez, Kee Kwang Lau, Alex Chew 2005-08-16
6734039 Semiconductor chip grid array package design and method of manufacture Tan Kim Hwee, Roman Perez, Kee Kwang Lau, Alex Chew 2004-05-11
6543127 Coplanarity inspection at the singulation process Weddie Aquien, John Briar 2003-04-08