Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Walter Schwarzenbach — 53 Patents

SOSoitec: 31 patents #8 of 259Top 4%
STS.O.I. Tec Silicon On Insulator Technologies: 20 patents #11 of 155Top 8%
NSNational University Of Singapore: 1 patents #498 of 1,623Top 35%
Saint-Nazaire-les-Eymes, FR: #1 of 13 inventorsTop 8%
Overall (All Time): #48,528 of 4,157,543Top 2%
53 Patents All Time
Walter Schwarzenbach has been granted 53 US patents while listed as an inventor at Soitec. The first was granted in 2004 and the most recent in November 2025. Walter Schwarzenbach ranks #48,528 of 4,157,543 US inventors in our database (top 1.2%). Patent records list Walter Schwarzenbach in Saint-Nazaire-les-Eymes, FR.

Issued Patents All Time

Showing 1–25 of 53 patents

Patent #TitleCo-InventorsDate
12476134 Semiconductor structure for digital and radiofrequency applications, and method for manufacturing such a structure Yvan Morandini, Frédéric Allibert, Eric Desbonnets, Bich-Yen Nguyen 2025-11-18
12272720 Front-side type image sensors 2025-04-08
12261079 Method for fabricating a strained semiconductor-on-insulator substrate Guillaume Chabanne, Nicolas Daval 2025-03-25
12218201 Device architectures with tensile and compressive strained substrates Bich-Yen Nguyen, Christophe Maleville, Gong Xiao, Aaron Voon-Yew THEAN, Chen Sun +1 more 2025-02-04
12198975 Semiconductor on insulator structure for a front side type imager Oleg Kononchuk, Ludovic Ecarnot 2025-01-14
12176244 Method for bonding two substrates Laurent Viravaux 2024-12-24
12148755 Front-side-type image sensor Manuel Sellier, Ludovic Ecarnot 2024-11-19
12100727 Method for manufacturing a substrate for a front-facing image sensor Ludovic Ecarnot, Damien Massy, Nadia Ben Mohamed, Nicolas Daval, Christophe Girard +1 more 2024-09-24
12074056 Method for producing an advanced substrate for hybrid integration 2024-08-27
11876020 Method for manufacturing a CFET device Ludovic Ecarnot, Nicolas Daval, Bich-Yen Nguyen, Guillaume Besnard 2024-01-16
11855120 Substrate for a front-side-type image sensor and method for producing such a substrate Oleg Kononchuk, Ludovic Ecarnot, Christelle Michau 2023-12-26
11728207 Method for fabricating a strained semiconductor-on-insulator substrate Guillaume Chabanne, Nicolas Daval 2023-08-15
11552123 Front-side type image sensors 2023-01-10
11476153 Method for producing an advanced substrate for hybrid integration 2022-10-18
11282889 Substrate for a front-side-type image sensor and method for producing such a substrate Oleg Kononchuk, Ludovic Ecarnot, Christelle Michau 2022-03-22
11205702 Method for manufacturing a structure for forming a tridimensional monolithic integrated circuit Christophe Figuet, Ludovic Ecarnot, Bich-Yen Nguyen, Daniel Delprat, Ionut Radu 2021-12-21
11127775 Substrate for front side type imager and method of manufacturing such a substrate Oleg Kononchuk, Ludovic Ecarnot, Christelle Michau 2021-09-21
11127624 Method of manufacturing a semiconductor on insulator type structure, notably for a front side type imager Oleg Kononchuk, Ludovic Ecarnot 2021-09-21
10957577 Method for fabricating a strained semiconductor-on-insulator substrate Guillaume Chabanne, Nicolas Daval 2021-03-23
10903263 Front-side type image sensor and method for manufacturing such a sensor 2021-01-26
10672646 Method for fabricating a strained semiconductor-on-insulator substrate Guillaume Chabanne, Nicolas Daval 2020-06-02
9698063 Method of testing a semiconductor-on-insulator structure and application of said test to the fabrication of such a structure Patrick Reynaud, Konstantin Bourdelle, Jean Gilbert 2017-07-04
9576798 Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers Bich-Yen Nguyen, Christophe Maleville 2017-02-21
9209301 Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers Bich-Yen Nguyen, Christophe Maleville 2015-12-08
9190284 Process for treating a semiconductor-on-insulator structure for improving thickness uniformity of the semiconductor layer Carine Duret, Francois Boedt 2015-11-17