Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Patrick Reynaud — 19 Patents

SOSoitec: 9 patents #33 of 259Top 15%
STS.O.I. Tec Silicon On Insulator Technologies: 5 patents #32 of 155Top 25%
CEA: 3 patents #1,381 of 7,956Top 20%
TSTornier Sas: 2 patents #33 of 73Top 50%
Meylan, FR: #28 of 946 inventorsTop 3%
Overall (All Time): #229,345 of 4,157,543Top 6%
19 Patents All Time
Patrick Reynaud has been granted 19 US patents while listed as an inventor at Soitec. The first was granted in 2008 and the most recent in June 2022. Patrick Reynaud ranks #229,345 of 4,157,543 US inventors in our database (top 5.5%). Patent records list Patrick Reynaud in Meylan, FR.

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #TitleCo-InventorsDate
11373856 Support for a semiconductor structure Marcel Broekaart, Frédéric Allibert, Christelle Veytizou, Luciana Capello, Isabelle Bertrand 2022-06-28
10858244 Device for connecting at least one nano-object associated with a chip enabling a connection to at least one external electrical system and method of fabrication thereof Aurelie Thuaire, Patrick Leduc, Emmanuel Rolland 2020-12-08
10204786 Device for connecting at least one nano-object and method of manufacturing it Xavier Baillin, Emmanuel Rolland, Aurelie Thuaire 2019-02-12
10107772 Electronical device for measuring at least one electrical characteristic of an object Corentin Carmignani, Christophe Brun, Emmanuel Rolland 2018-10-23
9698063 Method of testing a semiconductor-on-insulator structure and application of said test to the fabrication of such a structure Walter Schwarzenbach, Konstantin Bourdelle, Jean Gilbert 2017-07-04
9653536 Method for fabricating a structure Alexandre Chibko, Isabelle Bertrand, Sylvain Peru, Sothachett Van 2017-05-16
9293473 Method for manufacturing a semiconductor on insulator structure having low electrical losses Sebastien Kerdiles, Daniel Delprat 2016-03-22
9244019 Method for measuring defects in a silicon substrate by applying a heat treatment which consolidates and enlarges the defects Christophe Gourdel 2016-01-26
8962492 Method to thin a silicon-on-insulator substrate Ludovic Ecarnot, Khalid Radouane 2015-02-24
8962450 Method for manufacturing a semiconductor-on-insulator structure having low electrical losses Sebastien Kerdiles, Daniel Delprat 2015-02-24
8821503 Ancillary tool and method for positioning a prosthetic acetabulum of a hip prosthesis Alain Tornier, Jean-Pierre Berger, Arnaud Godeneche, Christophe Hulet, Jean-Claude Panisset +3 more 2014-09-02
8658514 Method for manufacturing a semiconductor-on-insulator structure having low electrical losses, and corresponding structure Sebastien Kerdiles, Daniel Delprat 2014-02-25
8389412 Finishing method for a silicon on insulator substrate Walter Schwarzenbach, Sebastien Kerdiles, Ludovic Ecarnot, Eric Neyret 2013-03-05
7892861 Method for fabricating a compound-material wafer Ludovic Ecarnot, Willy Michel, Walter Schwarzenbach 2011-02-22
7736994 Method for manufacturing compound material wafers and corresponding compound material wafer Oleg Kononchuk, Michael Stinco 2010-06-15
7718534 Planarization of a heteroepitaxial layer Muriel Martinez, Frederic Metral, Zohra Chahra 2010-05-18
7413964 Method of revealing crystalline defects in a bulk substrate Oleg Kononchuk, Christophe Maleville 2008-08-19
7405136 Methods for manufacturing compound-material wafers and for recycling used donor substrates Daniel Delprat, Eric Neyret, Oleg Kononchuk, Michael Stinco 2008-07-29
7396357 Ancillary tool and method for positioning a prosthetic acetabulum of a hip prosthesis Alain Tornier, Jean-Pierre Berger, Arnaud Godeneche, Christophe Hulet, Jean-Claude Panisset +3 more 2008-07-08