MM

Muriel Martinez

ST S.O.I. Tec Silicon On Insulator Technologies: 6 patents #27 of 155Top 20%
SO Soitec: 1 patents #140 of 259Top 55%
Overall (All Time): #747,110 of 4,157,543Top 20%
7
Patents All Time

Issued Patents All Time

Showing 1–7 of 7 patents

Patent #TitleCo-InventorsDate
8304345 Germanium layer polishing Pierre Bey 2012-11-06
7718534 Planarization of a heteroepitaxial layer Frederic Metral, Patrick Reynaud, Zohra Chahra 2010-05-18
7406994 Substrate layer cutting device and method Thierry Barge, Alain Soubie, Chrystelle Lagahe-Blanchard, Cecile Berne, Olivier Rayssac 2008-08-05
7391094 Semiconductor structure and method of making same Olivier Rayssac, Sephorah Bisson, Lionel Portigliatti 2008-06-24
7189304 Substrate layer cutting device and method Thierry Barge, Alain Soubie, Chrystelle Lagahe-Blanchard, Cecile Berne, Olivier Rayssac 2007-03-13
6989314 Semiconductor structure and method of making same Olivier Rayssac, Sephorah Bisson, Lionel Portigliatti 2006-01-24
6858517 Methods of producing a heterogeneous semiconductor structure Alice Boussagol 2005-02-22