GC

Guillaume Chabanne

SO Soitec: 5 patents #50 of 259Top 20%
Overall (All Time): #905,738 of 4,157,543Top 25%
5
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12261079 Method for fabricating a strained semiconductor-on-insulator substrate Walter Schwarzenbach, Nicolas Daval 2025-03-25
11728207 Method for fabricating a strained semiconductor-on-insulator substrate Walter Schwarzenbach, Nicolas Daval 2023-08-15
10957577 Method for fabricating a strained semiconductor-on-insulator substrate Walter Schwarzenbach, Nicolas Daval 2021-03-23
10672646 Method for fabricating a strained semiconductor-on-insulator substrate Walter Schwarzenbach, Nicolas Daval 2020-06-02
9799549 Process for manufacturing a composite structure Sebastien Kerdiles, Francois Boedt, Aurelia Pierret, Xavier Schneider, Didier Landru 2017-10-24