Issued Patents All Time
Showing 76–100 of 187 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10770165 | No-verify programming followed by short circuit test in memory device | Xue Qing Cai, Jiahui Yuan | 2020-09-08 |
| 10734070 | Programming selection devices in non-volatile memory strings | Xiang Yang, Dengtao Zhao, Huai-Yuan Tseng, Zhongguang Xu, Yanli Zhang +1 more | 2020-08-04 |
| 10727276 | Three-dimensional NAND memory device containing two terminal selector and methods of using and making thereof | Yu-Chung Lien, Jiahui Yuan, Christopher J. Petti | 2020-07-28 |
| 10726891 | Reducing post-read disturb in a nonvolatile memory device | Abhijith Prakash, Anubhav Khandelwal, Huai-Yuan Tseng, Wei Zhao, Dengtao Zhao | 2020-07-28 |
| 10726922 | Memory device with connected word lines for fast programming | Xiang Yang, Huai-Yuan Tseng | 2020-07-28 |
| 10726925 | Manage source line bias to account for non-uniform resistance of memory cell source lines | Murong Lang, Zhenming Zhou | 2020-07-28 |
| 10714198 | Dynamic 1-tier scan for high performance 3D NAND | Xiang Yang, Huai-Yuan Tseng | 2020-07-14 |
| 10643692 | Adaptive programming voltage for non-volatile memory devices | Xiang Yang, Huai-Yuan Tseng | 2020-05-05 |
| 10643718 | Non-volatile memory with countermeasure for program disturb including purge during precharge | Dengtao Zhao, Peng Zhang, Nan Lu | 2020-05-05 |
| 10643720 | Bit line voltage control for damping memory programming | Xiang Yang, Gerrit Jan Hemink, Tai-Yuan Tseng, Yan Li | 2020-05-05 |
| 10643721 | Interleaved program and verify in non-volatile memory | Xiang Yang, Huai-Yuan Tseng | 2020-05-05 |
| 10636487 | Memory device with bit lines disconnected from NAND strings for fast programming | Xiang Yang, Huai-Yuan Tseng | 2020-04-28 |
| 10636498 | Managing bit-line settling time in non-volatile memory | Yu-Chung Lien, Xiang Yang, Zhenming Zhou | 2020-04-28 |
| 10636494 | Apparatus and method for reducing noise generated from locked out sense circuits in a non-volatile memory system | Xiang Yang, Stanley Jeong, Wei Zhao, Huai-Yuan Tseng | 2020-04-28 |
| 10614898 | Adaptive control of memory cell programming voltage | Xiang Yang, Huai-Yuan Tseng | 2020-04-07 |
| 10580504 | Non-volatile memory with countermeasure for program disturb including spike during boosting | Dengtao Zhao, Peng Zhang, Nan Lu | 2020-03-03 |
| 10559365 | Peak current suppression | Xiang Yang, Huai-Yuan Tseng | 2020-02-11 |
| 10559370 | System and method for in-situ programming and read operation adjustments in a non-volatile memory | Xiang Yang, Piyush Dak, Wei Zhao, Huai-Yuan Tseng, Mohan Dunga | 2020-02-11 |
| 10553298 | Non-volatile memory with countermeasure for select gate disturb | Dengtao Zhao | 2020-02-04 |
| 10541037 | Non-volatile memory with countermeasure for program disturb including delayed ramp down during program verify | Dengtao Zhao | 2020-01-21 |
| 10541038 | Subgroup selection for verification | Yu-Chung Lien, Xiang Yang, Zhenming Zhou, Huai-Yuan Tseng | 2020-01-21 |
| 10535412 | Single pulse verification of memory cells | Xiang Yang, Huai-Yuan Tseng, Jianzhi Wu, Gerrit Jan Hemink | 2020-01-14 |
| 10529435 | Fast detection of defective memory block to prevent neighbor plane disturb | Sarath Puthenthermadam, Long Pham | 2020-01-07 |
| 10482985 | Dynamic erase loop dependent bias voltage | Xiang Yang, Huai-Yuan Tseng | 2019-11-19 |
| 10482984 | Ramp down sensing between program voltage and verify voltage in memory device | Xiang Yang, Huai-Yuan Tseng | 2019-11-19 |