Issued Patents All Time
Showing 26–50 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8129272 | Hidden plating traces | Hem Takiar, Cheeman Yu, Ken Jian Ming Wang, Chin-Tien Chiu, Han-Shiao Chen | 2012-03-06 |
| 8097495 | Die package with asymmetric leadframe connection | Ming-Hsun Lee, Cheemen Yu, Hem Takiar | 2012-01-17 |
| 8053880 | Stacked, interconnected semiconductor package | Cheeman Yu, Hem Takiar | 2011-11-08 |
| 7967184 | Padless substrate for surface mounted components | Ken Jian Ming Wang, Han-Shiao Chen, Chin-Tien Chiu, Jack Chang Chien, Shrikar Bhagath +2 more | 2011-06-28 |
| 7952179 | Semiconductor package having through holes for molding back side of package | Chin-Tien Chiu, Hem Takiar, Cheemen Yu, Ning Ye, Jack Chang Chien | 2011-05-31 |
| 7939382 | Method of fabricating a semiconductor package having through holes for molding back side of package | Chin-Tien Chiu, Hem Takiar, Cheemen Yu, Ning Ye, Jack Chang Chien | 2011-05-10 |
| 7806731 | Rounded contact fingers on substrate/PCB for crack prevention | Hem Takiar, Cheemen Yu, Ken Jian Ming Wang, Chin-Tien Chiu, Han-Shiao Chen | 2010-10-05 |
| 7772107 | Methods of forming a single layer substrate for high capacity memory cards | Cheemen Yu, Hem Takiar | 2010-08-10 |
| 7746661 | Printed circuit board with coextensive electrical connectors and contact pad areas | Han-Shiao Chen, Chin-Tien Chiu, Ken Jian Ming Wang, Cheemen Yu, Hem Takiar | 2010-06-29 |
| 7663216 | High density three dimensional semiconductor die package | Cheemen Yu, Hem Takiar | 2010-02-16 |
| 7615409 | Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages | Cheemen Yu, Hem Takiar | 2009-11-10 |
| 7611927 | Method of minimizing kerf width on a semiconductor substrate panel | Ning Ye, Cheemen Yu, Jack Chang Chien, Hem Takiar | 2009-11-03 |
| 7592699 | Hidden plating traces | Hem Takiar, Cheemen Yu, Ken Jian Ming Wang, Chin-Tien Chiu, Han-Shiao Chen | 2009-09-22 |
| 7550834 | Stacked, interconnected semiconductor packages | Cheemen Yu, Hem Takiar | 2009-06-23 |
| 7538438 | Substrate warpage control and continuous electrical enhancement | Cheemen Yu, Ken Jian Ming Wang, Chin-Tien Chiu, Han-Shiao Chen | 2009-05-26 |
| 7375415 | Die package with asymmetric leadframe connection | Ming-Hsun Lee, Cheemen Yu, Hem Takiar | 2008-05-20 |
| 7355283 | Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging | Chin-Tien Chiu, Ken Jian Ming Wang, Han-Shiao Chen, Cheemen Yu, Hem Takiar | 2008-04-08 |
| 6943439 | Substrate and fabrication method of the same | Chien-Ping Huang, Han-Ping Pu | 2005-09-13 |
| 6740978 | Chip package capable of reducing moisture penetration | Chien-Ping Huang, Yung-Kang Chu | 2004-05-25 |
| 6689636 | Semiconductor device and fabrication method of the same | Han-Ping Pu, Chien-Ping Huang | 2004-02-10 |
| 6593658 | Chip package capable of reducing moisture penetration | Chien-Ping Huang, Yung-Kang Chu | 2003-07-15 |
| 6570249 | Semiconductor package | Han-Ping Pu, Chien-Ping Huang | 2003-05-27 |
| 6531762 | Semiconductor package | Kuan-Cheng Chen | 2003-03-11 |
| 6465891 | Integrated-circuit package with a quick-to-count finger layout design on substrate | Wen-Hsin Wang | 2002-10-15 |
| 6449169 | Ball grid array package with interdigitated power ring and ground ring | Tzong-Da Ho, Chien-Te Chen | 2002-09-10 |