Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12193166 | Printed circuit board having a sacrificial pad to mitigate galvanic corrosion | Songtao Lu, Hsiang Ju Huang, Binbin Zheng, Cheng-Hsiung Yang | 2025-01-07 |
| 12022618 | Printed circuit board with stacked passive components | Cong Zhang, Yu Ying Tan, Hsiao Jung Lin, Chieh-Kai Yang | 2024-06-25 |
| 11924964 | Printed circuit board for galvanic effect reduction | Lin Hui Chen, Songtao Lu, Yu Ying Tan, Huang Pao Yi, Ching-Chuan Hsieh +2 more | 2024-03-05 |
| 11557555 | Bumped pad structure | Hsiao Jung Lin, Ai Wen Wang, Chieh-Kai Yang | 2023-01-17 |
| 11139277 | Semiconductor device including contact fingers on opposed surfaces | Cong Zhang, Hsiang Ju Huang, Xuyi Yang, Yu Ying Tan, Han-Shiao Chen | 2021-10-05 |
| 8772647 | Single-cap via-in-pad and methods for forming thereof | — | 2014-07-08 |
| D687692 | Socket wrench | — | 2013-08-13 |
| 8161635 | Methods for forming a single cap via in pad of substrate | — | 2012-04-24 |
| 7427968 | Antenna device having rotatable structure | Yat To Chan | 2008-09-23 |
| 7402755 | Circuit board with quality-indicator mark and method for indicating quality of the circuit board | Chih-Hao Chang | 2008-07-22 |
| 7361846 | High electrical performance semiconductor package | Wen-Jung Chiang, Yu-Po Wang | 2008-04-22 |
| 7141868 | Flash preventing substrate and method for fabricating the same | Yu-Lin Liao | 2006-11-28 |
| 7119565 | Chip carrier and method for testing electrical performance of passive component | Chien-Ping Huang | 2006-10-10 |
| 6700204 | Substrate for accommodating passive component | Chien-Ping Huang | 2004-03-02 |
| 6449169 | Ball grid array package with interdigitated power ring and ground ring | Tzong-Da Ho, Chih-Chin Liao | 2002-09-10 |