Issued Patents All Time
Showing 51–75 of 91 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9165638 | Method and apparatus for calibrating write timing in a memory system | Thomas J. Giovannini, Alok Gupta, Ian Shaeffer | 2015-10-20 |
| 9142281 | Method and apparatus for calibrating write timing in a memory system | Thomas J. Giovannini, Alok Gupta, Ian Shaeffer | 2015-09-22 |
| 9098209 | Communication via a memory interface | Liji Gopalakrishnan, Vlad Fruchter, Lawrence Lai, Pradeep Batra, Wayne F. Ellis | 2015-08-04 |
| 9043513 | Methods and systems for mapping a peripheral function onto a legacy memory interface | Richard E. Perego, Pradeep Batra, Lawrence Lai, Chi-Ming Yeung | 2015-05-26 |
| 8935489 | Adaptively time-multiplexing memory references from multiple processor cores | Trung Diep, Michael Ching | 2015-01-13 |
| 8838900 | Atomic-operation coalescing technique in multi-chip systems | Qi Lin, Liang Ping Peng, Craig E. Hampel, Thomas J. Sheffler, Bohuslav Rychlik | 2014-09-16 |
| 8665642 | Pattern-sensitive coding of data for storage in multi-level memory cells | Bohuslav Rychlik, John Eric Linstadt, Brent Haukness | 2014-03-04 |
| 8473681 | Atomic-operation coalescing technique in multi-chip systems | Qi Lin, Liang Ping Peng, Craig E. Hampel, Thomas J. Sheffler, Bohuslav Rychlik | 2013-06-25 |
| 8407441 | Method and apparatus for calibrating write timing in a memory system | Thomas J. Giovannini, Alok Gupta, Ian Shaeffer | 2013-03-26 |
| 8332556 | Selective switching of a memory bus | Scott C. Best | 2012-12-11 |
| 8184497 | Methods and systems for reducing heat flux in memory systems | Craig E. Hampel | 2012-05-22 |
| 8149874 | Adaptive-allocation of I/O bandwidth using a configurable interconnect topology | Michael Ching | 2012-04-03 |
| 8135890 | Selective switching of a memory bus | Scott C. Best | 2012-03-13 |
| 8073009 | Adaptive allocation of I/O bandwidth using a configurable interconnect topology | Michael Ching | 2011-12-06 |
| 8018789 | Methods and systems for reducing heat flux in memory systems | Craig E. Hampel | 2011-09-13 |
| 7755968 | Integrated circuit memory device having dynamic memory bank count and page size | Michael Ching, Chad A. Bellows, Wayne S. Richardson, Kurt Knorpp, Jun Kim | 2010-07-13 |
| 7599239 | Methods and systems for reducing heat flux in memory systems | Craig E. Hampel | 2009-10-06 |
| 7454555 | Apparatus and method including a memory device having multiple sets of memory banks with duplicated data emulating a fast access time, fixed latency memory device | Frederick A. Ware, Ely Tsern, Richard E. Perego | 2008-11-18 |
| 7420990 | Adaptive-allocation of I/O bandwidth using a configurable interconnect topology | Michael Ching | 2008-09-02 |
| 7370152 | Memory controller with prefetching capability | Bradley A. May, Liewei Bao | 2008-05-06 |
| 7254075 | Integrated circuit memory system having dynamic memory bank count and page size | Michael Ching, Chad A. Bellows, Wayne S. Richardson, Kurt Knorpp, Jun Kim | 2007-08-07 |
| 7222224 | System and method for improving performance in computer memory systems supporting multiple memory access latencies | Brian Hing-Kit Tsang | 2007-05-22 |
| 7158536 | Adaptive-allocation of I/O bandwidth using a configurable interconnect topology | Michael Ching | 2007-01-02 |
| 7039782 | Memory system with channel multiplexing of multiple memory devices | Billy Wayne Garrett, Jr., Frederick A. Ware, Craig E. Hampel, Richard M. Barth, Donald C. Stark +4 more | 2006-05-02 |
| 7003639 | Memory controller with power management logic | Ely Tsern, Ramprasad Satagopan, Richard M. Barth | 2006-02-21 |